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Searched refs:HS_SLAB_WIDTH_LOG2 (Results 1 – 24 of 24) sorted by relevance

/external/skqp/src/compute/hs/vk/intel/gen8/u32/
Dhs_config.h13 #define HS_SLAB_WIDTH_LOG2 4 macro
14 #define HS_SLAB_WIDTH (1 << HS_SLAB_WIDTH_LOG2)
Dhs_intel_gen8_u32.c25 .width_log2 = HS_SLAB_WIDTH_LOG2,
/external/skqp/src/compute/hs/cl/intel/gen8/u32/
Dhs_config.h13 #define HS_SLAB_WIDTH_LOG2 4 macro
14 #define HS_SLAB_WIDTH (1 << HS_SLAB_WIDTH_LOG2)
Dhs_intel_gen8_u32.c39 .width_log2 = HS_SLAB_WIDTH_LOG2,
/external/skqp/src/compute/hs/vk/nvidia/sm_35/u64/
Dhs_config.h13 #define HS_SLAB_WIDTH_LOG2 5 macro
14 #define HS_SLAB_WIDTH (1 << HS_SLAB_WIDTH_LOG2)
Dhs_nvidia_sm35_u64.c25 .width_log2 = HS_SLAB_WIDTH_LOG2,
/external/skqp/src/compute/hs/cuda/sm_35/u64/
Dhs_cuda_config.h13 #define HS_SLAB_WIDTH_LOG2 5 macro
14 #define HS_SLAB_WIDTH (1 << HS_SLAB_WIDTH_LOG2)
/external/skqp/src/compute/hs/vk/amd/gcn/u64/
Dhs_config.h13 #define HS_SLAB_WIDTH_LOG2 6 macro
14 #define HS_SLAB_WIDTH (1 << HS_SLAB_WIDTH_LOG2)
Dhs_amd_gcn_u64.c25 .width_log2 = HS_SLAB_WIDTH_LOG2,
/external/skqp/src/compute/hs/vk/intel/gen8/u64/
Dhs_config.h13 #define HS_SLAB_WIDTH_LOG2 3 macro
14 #define HS_SLAB_WIDTH (1 << HS_SLAB_WIDTH_LOG2)
Dhs_intel_gen8_u64.c25 .width_log2 = HS_SLAB_WIDTH_LOG2,
/external/skqp/src/compute/hs/cl/intel/gen8/u64/
Dhs_config.h13 #define HS_SLAB_WIDTH_LOG2 3 macro
14 #define HS_SLAB_WIDTH (1 << HS_SLAB_WIDTH_LOG2)
Dhs_intel_gen8_u64.c39 .width_log2 = HS_SLAB_WIDTH_LOG2,
/external/skqp/src/compute/hs/vk/nvidia/sm_35/u32/
Dhs_config.h13 #define HS_SLAB_WIDTH_LOG2 5 macro
14 #define HS_SLAB_WIDTH (1 << HS_SLAB_WIDTH_LOG2)
Dhs_nvidia_sm35_u32.c25 .width_log2 = HS_SLAB_WIDTH_LOG2,
/external/skqp/src/compute/hs/cuda/sm_35/u32/
Dhs_cuda_config.h13 #define HS_SLAB_WIDTH_LOG2 5 macro
14 #define HS_SLAB_WIDTH (1 << HS_SLAB_WIDTH_LOG2)
/external/skqp/src/compute/hs/vk/amd/gcn/u32/
Dhs_config.h13 #define HS_SLAB_WIDTH_LOG2 6 macro
14 #define HS_SLAB_WIDTH (1 << HS_SLAB_WIDTH_LOG2)
Dhs_amd_gcn_u32.c25 .width_log2 = HS_SLAB_WIDTH_LOG2,
/external/skqp/src/compute/skc/platforms/cl_12/kernels/
Dsegment_ttrk.cl100 #define SKC_META_ZERO_REM (SKC_META_ZERO_COUNT & SKC_BITS_TO_MASK(HS_SLAB_WIDTH_LOG2))
123 uint const gmem_base = (global_id >> HS_SLAB_WIDTH_LOG2) * HS_SLAB_KEYS;
278 get_global_id(0)>>HS_SLAB_WIDTH_LOG2,c_min,c_max);
Dsegment_ttck.cl46 uint const gmem_base = (global_id >> HS_SLAB_WIDTH_LOG2) * HS_SLAB_KEYS;
/external/skqp/src/compute/hs/cl/intel/
Dhs_cl_macros.h376 vout[gmem_idx + ((row_to-1) << HS_SLAB_WIDTH_LOG2)] = \
/external/skqp/src/compute/hs/vk/
Dhs_glsl_macros.h404 vout[gmem_idx + ((row_to-1) << HS_SLAB_WIDTH_LOG2)] = \
/external/skqp/src/compute/hs/cuda/sm_35/
Dhs_cuda_macros.h488 vout[gmem_idx + ((row_to-1) << HS_SLAB_WIDTH_LOG2)] = \
/external/skqp/src/compute/hs/cuda/
Dhs_cuda.inl1040 *slab_width_log2 = HS_SLAB_WIDTH_LOG2;