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Searched refs:IsLaneSizeB (Results 1 – 5 of 5) sorted by relevance

/external/vixl/src/aarch64/
Dassembler-sve-aarch64.cc3618 VIXL_ASSERT((shift < 8) || !zd.IsLaneSizeB()); in dup()
4750 VIXL_ASSERT(zt.IsLaneSizeB()); in ld1rqb()
5287 VIXL_ASSERT(pd.IsLaneSizeB() && pn.IsLaneSizeB()); in brka()
5297 VIXL_ASSERT(pd.IsLaneSizeB() && pn.IsLaneSizeB()); in brkas()
5307 VIXL_ASSERT(pd.IsLaneSizeB() && pn.IsLaneSizeB()); in brkb()
5317 VIXL_ASSERT(pd.IsLaneSizeB() && pn.IsLaneSizeB()); in brkbs()
5328 VIXL_ASSERT(pd.IsLaneSizeB() && pn.IsLaneSizeB()); in brkn()
5340 VIXL_ASSERT(pd.IsLaneSizeB() && pn.IsLaneSizeB()); in brkns()
5356 VIXL_ASSERT(pn.IsLaneSizeB()); in punpkhi()
5369 VIXL_ASSERT(pn.IsLaneSizeB()); in punpklo()
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Dregisters-aarch64.h167 bool IsLaneSizeB() const { return lane_size_ == kEncodedBRegSize; } in IsLaneSizeB() function
327 bool Is8B() const { return IsD() && IsLaneSizeB(); } in Is8B()
328 bool Is16B() const { return IsQ() && IsLaneSizeB(); } in Is16B()
Dmacro-assembler-sve-aarch64.cc971 VIXL_ASSERT(pd.IsLaneSizeB()); in Pfirst()
972 VIXL_ASSERT(pn.IsLaneSizeB()); in Pfirst()
Dassembler-aarch64.cc3945 VIXL_ASSERT(vd.IsVector() && !vd.IsLaneSizeB()); in fcmla()
3959 VIXL_ASSERT(vd.IsVector() && !vd.IsLaneSizeB()); in fcadd()
Dmacro-assembler-aarch64.h5554 VIXL_ASSERT(!pd.HasLaneSize() || pd.IsLaneSizeB()); in Rdffr()
6339 VIXL_ASSERT(!pn.HasLaneSize() || pn.IsLaneSizeB()); in Wrffr()