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Searched refs:LIS (Results 1 – 25 of 281) sorted by relevance

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/external/llvm-project/llvm/unittests/MI/
DLiveIntervalTest.cpp88 LiveIntervals &LIS = getAnalysis<LiveIntervals>(); in runOnMachineFunction() local
89 T(MF, LIS); in runOnMachineFunction()
121 static void testHandleMove(MachineFunction &MF, LiveIntervals &LIS, in testHandleMove() argument
128 LIS.handleMove(FromInstr, true); in testHandleMove()
136 static void testHandleMoveIntoNewBundle(MachineFunction &MF, LiveIntervals &LIS, in testHandleMoveIntoNewBundle() argument
149 LIS.handleMoveIntoNewBundle(*BundleStart, true); in testHandleMoveIntoNewBundle()
193 )MIR", [](MachineFunction &MF, LiveIntervals &LIS) { in TEST() argument
194 testHandleMove(MF, LIS, 2, 1); in TEST()
204 )MIR", [](MachineFunction &MF, LiveIntervals &LIS) { in TEST() argument
205 testHandleMove(MF, LIS, 2, 1); in TEST()
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/external/llvm/unittests/MI/
DLiveIntervalTest.cpp91 LiveIntervals &LIS = getAnalysis<LiveIntervals>(); in runOnMachineFunction() local
92 T(MF, LIS); in runOnMachineFunction()
111 static void testHandleMove(MachineFunction &MF, LiveIntervals &LIS, in testHandleMove() argument
128 LIS.handleMove(*FromInstr, true); in testHandleMove()
171 [](MachineFunction &MF, LiveIntervals &LIS) { in TEST() argument
172 testHandleMove(MF, LIS, 2, 1); in TEST()
182 [](MachineFunction &MF, LiveIntervals &LIS) { in TEST() argument
183 testHandleMove(MF, LIS, 2, 1); in TEST()
193 [](MachineFunction &MF, LiveIntervals &LIS) { in TEST() argument
194 testHandleMove(MF, LIS, 2, 1); in TEST()
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/external/llvm/lib/Target/WebAssembly/
DWebAssemblyRegStackify.cpp229 const LiveIntervals &LIS) in GetVRegDef() argument
236 if (const VNInfo *ValNo = LIS.getInterval(Reg).getVNInfoBefore( in GetVRegDef()
237 LIS.getInstructionIndex(*Insert))) in GetVRegDef()
238 return LIS.getInstructionFromIndex(ValNo->def); in GetVRegDef()
248 LiveIntervals &LIS) { in HasOneUse() argument
254 const LiveInterval &LI = LIS.getInterval(Reg); in HasOneUse()
256 LIS.getInstructionIndex(*Def).getRegSlot()); in HasOneUse()
259 const auto &Result = LI.Query(LIS.getInstructionIndex(*I.getParent())); in HasOneUse()
277 AliasAnalysis &AA, const LiveIntervals &LIS, in IsSafeToMove() argument
310 const LiveInterval &LI = LIS.getInterval(Reg); in IsSafeToMove()
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DWebAssemblyStoreResults.cpp82 LiveIntervals &LIS) { in ReplaceDominatedUses() argument
85 LiveInterval *FromLI = &LIS.getInterval(FromReg); in ReplaceDominatedUses()
86 LiveInterval *ToLI = &LIS.getInterval(ToReg); in ReplaceDominatedUses()
88 SlotIndex FromIdx = LIS.getInstructionIndex(MI).getRegSlot(); in ReplaceDominatedUses()
102 SlotIndex WhereIdx = LIS.getInstructionIndex(*Where); in ReplaceDominatedUses()
127 LIS.extendToIndices(*ToLI, Indices); in ReplaceDominatedUses()
130 LIS.shrinkToUses(FromLI); in ReplaceDominatedUses()
145 LiveIntervals &LIS) { in optimizeStore() argument
148 return ReplaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT, LIS); in optimizeStore()
154 LiveIntervals &LIS, in optimizeCall() argument
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSILowerControlFlow.cpp82 LiveIntervals *LIS = nullptr; member in __anon93035e150111::SILowerControlFlow
252 if (!LIS) { in emitIf()
257 LIS->InsertMachineInstrInMaps(*CopyExec); in emitIf()
261 LIS->ReplaceMachineInstrInMaps(MI, *And); in emitIf()
264 LIS->InsertMachineInstrInMaps(*Xor); in emitIf()
265 LIS->InsertMachineInstrInMaps(*SetExec); in emitIf()
266 LIS->InsertMachineInstrInMaps(*NewBr); in emitIf()
268 LIS->removeAllRegUnitsForPhysReg(AMDGPU::EXEC); in emitIf()
274 LIS->removeInterval(SaveExecReg); in emitIf()
275 LIS->createAndComputeVirtRegInterval(SaveExecReg); in emitIf()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyRegStackify.cpp102 LiveIntervals &LIS) { in convertImplicitDefToConstZero() argument
129 LIS.InsertMachineInstrInMaps(*Const); in convertImplicitDefToConstZero()
271 const LiveIntervals &LIS) { in getVRegDef() argument
277 if (const VNInfo *ValNo = LIS.getInterval(Reg).getVNInfoBefore( in getVRegDef()
278 LIS.getInstructionIndex(*Insert))) in getVRegDef()
279 return LIS.getInstructionFromIndex(ValNo->def); in getVRegDef()
288 MachineDominatorTree &MDT, LiveIntervals &LIS) { in hasOneUse() argument
294 const LiveInterval &LI = LIS.getInterval(Reg); in hasOneUse()
296 LI.getVNInfoAt(LIS.getInstructionIndex(*Def).getRegSlot()); in hasOneUse()
299 const auto &Result = LI.Query(LIS.getInstructionIndex(*I.getParent())); in hasOneUse()
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/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyRegStackify.cpp103 LiveIntervals &LIS) { in convertImplicitDefToConstZero() argument
131 LIS.InsertMachineInstrInMaps(*Const); in convertImplicitDefToConstZero()
273 const LiveIntervals &LIS) { in getVRegDef() argument
279 if (const VNInfo *ValNo = LIS.getInterval(Reg).getVNInfoBefore( in getVRegDef()
280 LIS.getInstructionIndex(*Insert))) in getVRegDef()
281 return LIS.getInstructionFromIndex(ValNo->def); in getVRegDef()
290 MachineDominatorTree &MDT, LiveIntervals &LIS) { in hasOneUse() argument
296 const LiveInterval &LI = LIS.getInterval(Reg); in hasOneUse()
298 LI.getVNInfoAt(LIS.getInstructionIndex(*Def).getRegSlot()); in hasOneUse()
301 const auto &Result = LI.Query(LIS.getInstructionIndex(*I.getParent())); in hasOneUse()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DLiveRangeEdit.cpp39 LiveInterval &LI = LIS.createEmptyInterval(VReg); in createEmptyIntervalFrom()
46 LiveInterval &OldLI = LIS.getInterval(OldReg); in createEmptyIntervalFrom()
47 VNInfo::Allocator &Alloc = LIS.getVNInfoAllocator(); in createEmptyIntervalFrom()
66 LIS.getInterval(VReg).markNotSpillable(); in createFrom()
86 LiveInterval &OrigLI = LIS.getInterval(Original); in scanRemattable()
90 MachineInstr *DefMI = LIS.getInstructionFromIndex(OrigVNI->def); in scanRemattable()
123 LiveInterval &li = LIS.getInterval(MO.getReg()); in allUsesAvailableAt()
151 DefIdx = LIS.getInstructionIndex(*RM.OrigMI); in canRematerializeAt()
177 return LIS.getSlotIndexes()->insertMachineInstrInMaps(*MI, Late).getRegSlot(); in rematerializeAt()
182 LIS.removeInterval(Reg); in eraseVirtReg()
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DPHIElimination.cpp70 LiveIntervals *LIS; member in __anon3e7068f20111::PHIElimination
150 LIS = getAnalysisIfAvailable<LiveIntervals>(); in runOnMachineFunction()
158 if (!DisableEdgeSplitting && (LV || LIS)) { in runOnMachineFunction()
175 if (LIS) in runOnMachineFunction()
176 LIS->RemoveMachineInstrFromMaps(*DefMI); in runOnMachineFunction()
183 if (LIS) in runOnMachineFunction()
184 LIS->RemoveMachineInstrFromMaps(*I.first); in runOnMachineFunction()
327 if (LIS) { in LowerPHINode()
328 SlotIndex DestCopyIndex = LIS->InsertMachineInstrInMaps(*PHICopy); in LowerPHINode()
330 SlotIndex MBBStartIndex = LIS->getMBBStartIdx(&MBB); in LowerPHINode()
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DLiveDebugVariables.cpp178 unsigned SpillOffset, LiveIntervals &LIS,
185 LiveIntervals &LIS);
316 LiveIntervals &LIS);
331 MachineRegisterInfo &MRI, LiveIntervals &LIS);
336 LiveIntervals &LIS, LexicalScopes &LS);
341 LiveIntervals &LIS);
352 void emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
372 LiveIntervals &LIS, const TargetInstrInfo &TII);
386 void emitDebugLabel(LiveIntervals &LIS, const TargetInstrInfo &TII);
399 LiveIntervals *LIS; member in __anon467c72480211::LDVImpl
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DSplitKit.cpp73 : LIS(lis), LastInsertPoint(BBNum) {} in InsertPointAnalysis()
80 SlotIndex MBBEnd = LIS.getMBBEndIdx(&MBB); in computeLastInsertPoint()
94 LIP.first = LIS.getInstructionIndex(*FirstTerm); in computeLastInsertPoint()
105 LIP.second = LIS.getInstructionIndex(*I); in computeLastInsertPoint()
117 return LIS.isLiveInToMBB(CurLI, EHPad); in computeLastInsertPoint()
142 if (LIP == LIS.getMBBEndIdx(&MBB)) in getLastInsertPointIter()
144 return LIS.getInstructionFromIndex(LIP); in getLastInsertPointIter()
153 : MF(vrm.getMachineFunction()), VRM(vrm), LIS(lis), Loops(mli), in SplitAnalysis()
178 UseSlots.push_back(LIS.getInstructionIndex(*MO.getParent()).getRegSlot()); in analyzeUses()
195 const_cast<LiveIntervals&>(LIS) in analyzeUses()
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DInlineSpiller.cpp87 LiveIntervals &LIS; member in __anon50c296f20111::HoistSpillHelper
141 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()), in HoistSpillHelper()
149 IPA(LIS, mf.getNumBlockIDs()) {} in HoistSpillHelper()
160 LiveIntervals &LIS; member in __anon50c296f20111::InlineSpiller
197 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()), in InlineSpiller()
284 if (SnipLI.getNumValNums() > 2 || !LIS.intervalIsInOneMBB(SnipLI)) in isSnippet()
336 LiveInterval &SnipLI = LIS.getInterval(SnipReg); in collectRegsToSpill()
373 SlotIndex Idx = LIS.getInstructionIndex(CopyMI); in hoistSpillInsideBB()
380 LiveInterval &SrcLI = LIS.getInterval(SrcReg); in hoistSpillInsideBB()
383 MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(SrcVNI->def); in hoistSpillInsideBB()
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/external/llvm-project/llvm/lib/CodeGen/
DLiveRangeEdit.cpp39 LiveInterval &LI = LIS.createEmptyInterval(VReg); in createEmptyIntervalFrom()
46 LiveInterval &OldLI = LIS.getInterval(OldReg); in createEmptyIntervalFrom()
47 VNInfo::Allocator &Alloc = LIS.getVNInfoAllocator(); in createEmptyIntervalFrom()
66 LIS.getInterval(VReg).markNotSpillable(); in createFrom()
86 LiveInterval &OrigLI = LIS.getInterval(Original); in scanRemattable()
90 MachineInstr *DefMI = LIS.getInstructionFromIndex(OrigVNI->def); in scanRemattable()
123 LiveInterval &li = LIS.getInterval(MO.getReg()); in allUsesAvailableAt()
151 DefIdx = LIS.getInstructionIndex(*RM.OrigMI); in canRematerializeAt()
177 return LIS.getSlotIndexes()->insertMachineInstrInMaps(*MI, Late).getRegSlot(); in rematerializeAt()
182 LIS.removeInterval(Reg); in eraseVirtReg()
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DPHIElimination.cpp70 LiveIntervals *LIS; member in __anon44cf48de0111::PHIElimination
151 LIS = getAnalysisIfAvailable<LiveIntervals>(); in runOnMachineFunction()
156 if (!DisableEdgeSplitting && (LV || LIS)) { in runOnMachineFunction()
205 if (LIS) in runOnMachineFunction()
206 LIS->RemoveMachineInstrFromMaps(*DefMI); in runOnMachineFunction()
213 if (LIS) in runOnMachineFunction()
214 LIS->RemoveMachineInstrFromMaps(*I.first); in runOnMachineFunction()
379 if (LIS) { in LowerPHINode()
380 SlotIndex DestCopyIndex = LIS->InsertMachineInstrInMaps(*PHICopy); in LowerPHINode()
382 SlotIndex MBBStartIndex = LIS->getMBBStartIdx(&MBB); in LowerPHINode()
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DSplitKit.cpp61 : LIS(lis), LastInsertPoint(BBNum) {} in InsertPointAnalysis()
68 SlotIndex MBBEnd = LIS.getMBBEndIdx(&MBB); in computeLastInsertPoint()
87 LIP.first = LIS.getInstructionIndex(*FirstTerm); in computeLastInsertPoint()
100 LIP.second = LIS.getInstructionIndex(*I); in computeLastInsertPoint()
112 return LIS.isLiveInToMBB(CurLI, EHPad); in computeLastInsertPoint()
137 if (LIP == LIS.getMBBEndIdx(&MBB)) in getLastInsertPointIter()
139 return LIS.getInstructionFromIndex(LIP); in getLastInsertPointIter()
148 : MF(vrm.getMachineFunction()), VRM(vrm), LIS(lis), Loops(mli), in SplitAnalysis()
173 UseSlots.push_back(LIS.getInstructionIndex(*MO.getParent()).getRegSlot()); in analyzeUses()
190 const_cast<LiveIntervals&>(LIS) in analyzeUses()
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DLiveDebugVariables.cpp182 bool Spilled, unsigned SpillOffset, LiveIntervals &LIS,
189 LiveIntervals &LIS);
313 LiveIntervals &LIS);
327 MachineRegisterInfo &MRI, LiveIntervals &LIS);
332 LiveIntervals &LIS, LexicalScopes &LS);
337 LiveIntervals &LIS);
348 void emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
368 LiveIntervals &LIS, const TargetInstrInfo &TII);
382 void emitDebugLabel(LiveIntervals &LIS, const TargetInstrInfo &TII);
395 LiveIntervals *LIS; member in __anon1fe168340311::LDVImpl
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DInlineSpiller.cpp88 LiveIntervals &LIS; member in __anonbd8f295e0111::HoistSpillHelper
142 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()), in HoistSpillHelper()
150 IPA(LIS, mf.getNumBlockIDs()) {} in HoistSpillHelper()
161 LiveIntervals &LIS; member in __anonbd8f295e0111::InlineSpiller
198 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()), in InlineSpiller()
285 if (SnipLI.getNumValNums() > 2 || !LIS.intervalIsInOneMBB(SnipLI)) in isSnippet()
338 LiveInterval &SnipLI = LIS.getInterval(SnipReg); in collectRegsToSpill()
375 SlotIndex Idx = LIS.getInstructionIndex(CopyMI); in hoistSpillInsideBB()
382 LiveInterval &SrcLI = LIS.getInterval(SrcReg); in hoistSpillInsideBB()
385 MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(SrcVNI->def); in hoistSpillInsideBB()
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/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIOptimizeExecMaskingPreRA.cpp34 LiveIntervals *LIS; member in __anon601bd6590111::SIOptimizeExecMaskingPreRA
92 LiveIntervals *LIS, Register Reg, in isDefBetween() argument
94 SlotIndex AndIdx = LIS->getInstructionIndex(And); in isDefBetween()
95 SlotIndex SelIdx = LIS->getInstructionIndex(Sel); in isDefBetween()
98 return isDefBetween(LIS->getInterval(Reg), AndIdx, SelIdx); in isDefBetween()
101 if (isDefBetween(LIS->getRegUnit(*UI), AndIdx, SelIdx)) in isDefBetween()
134 TRI->findReachingDef(CondReg, AMDGPU::NoSubRegister, *I, *MRI, LIS); in optimizeVcndVcmpPair()
150 auto *Cmp = TRI->findReachingDef(CmpReg, CmpSubReg, *And, *MRI, LIS); in optimizeVcndVcmpPair()
164 auto *Sel = TRI->findReachingDef(SelReg, Op1->getSubReg(), *Cmp, *MRI, LIS); in optimizeVcndVcmpPair()
183 if (isDefBetween(*TRI, LIS, CCReg, *Sel, *And)) in optimizeVcndVcmpPair()
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DSILowerControlFlow.cpp88 LiveIntervals *LIS = nullptr; member in __anon5a3c15010111::SILowerControlFlow
301 if (!LIS) { in emitIf()
306 LIS->InsertMachineInstrInMaps(*CopyExec); in emitIf()
310 LIS->ReplaceMachineInstrInMaps(MI, *And); in emitIf()
313 LIS->InsertMachineInstrInMaps(*Xor); in emitIf()
314 LIS->InsertMachineInstrInMaps(*SetExec); in emitIf()
315 LIS->InsertMachineInstrInMaps(*NewBr); in emitIf()
317 LIS->removeAllRegUnitsForPhysReg(AMDGPU::EXEC); in emitIf()
323 LIS->removeInterval(SaveExecReg); in emitIf()
324 LIS->createAndComputeVirtRegInterval(SaveExecReg); in emitIf()
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/external/llvm/lib/CodeGen/
DPHIElimination.cpp57 LiveIntervals *LIS; member in __anonc47cba500111::PHIElimination
135 LIS = getAnalysisIfAvailable<LiveIntervals>(); in runOnMachineFunction()
144 if (!DisableEdgeSplitting && (LV || LIS)) { in runOnMachineFunction()
161 if (LIS) in runOnMachineFunction()
162 LIS->RemoveMachineInstrFromMaps(*DefMI); in runOnMachineFunction()
169 if (LIS) in runOnMachineFunction()
170 LIS->RemoveMachineInstrFromMaps(*I.first); in runOnMachineFunction()
310 if (LIS) { in LowerPHINode()
312 LIS->InsertMachineInstrInMaps(*std::prev(AfterPHIsIt)); in LowerPHINode()
314 SlotIndex MBBStartIndex = LIS->getMBBStartIdx(&MBB); in LowerPHINode()
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DLiveRangeEdit.cpp39 LiveInterval &LI = LIS.createEmptyInterval(VReg); in createEmptyIntervalFrom()
67 LiveInterval &OrigLI = LIS.getInterval(Original); in scanRemattable()
69 MachineInstr *DefMI = LIS.getInstructionFromIndex(OrigVNI->def); in scanRemattable()
102 LiveInterval &li = LIS.getInterval(MO.getReg()); in allUsesAvailableAt()
130 DefIdx = LIS.getInstructionIndex(*RM.OrigMI); in canRematerializeAt()
156 return LIS.getSlotIndexes()->insertMachineInstrInMaps(*MI, Late).getRegSlot(); in rematerializeAt()
161 LIS.removeInterval(Reg); in eraseVirtReg()
191 if (!allUsesAvailableAt(DefMI, LIS.getInstructionIndex(*DefMI), in foldAsLoad()
192 LIS.getInstructionIndex(*UseMI))) in foldAsLoad()
208 MachineInstr *FoldMI = TII.foldMemoryOperand(*UseMI, Ops, *DefMI, &LIS); in foldAsLoad()
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DSplitKit.cpp46 : LIS(lis), LastInsertPoint(BBNum) {} in InsertPointAnalysis()
53 SlotIndex MBBEnd = LIS.getMBBEndIdx(&MBB); in computeLastInsertPoint()
67 LIP.first = LIS.getInstructionIndex(*FirstTerm); in computeLastInsertPoint()
78 LIP.second = LIS.getInstructionIndex(*I); in computeLastInsertPoint()
90 return LIS.isLiveInToMBB(CurLI, EHPad); in computeLastInsertPoint()
115 if (LIP == LIS.getMBBEndIdx(&MBB)) in getLastInsertPointIter()
117 return LIS.getInstructionFromIndex(LIP); in getLastInsertPointIter()
126 : MF(vrm.getMachineFunction()), VRM(vrm), LIS(lis), Loops(mli), in SplitAnalysis()
152 UseSlots.push_back(LIS.getInstructionIndex(*MO.getParent()).getRegSlot()); in analyzeUses()
169 const_cast<LiveIntervals&>(LIS) in analyzeUses()
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DInlineSpiller.cpp61 LiveIntervals &LIS; member in __anonf7bb34900111::HoistSpillHelper
112 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()), in HoistSpillHelper()
121 IPA(LIS, mf.getNumBlockIDs()) {} in HoistSpillHelper()
132 LiveIntervals &LIS; member in __anonf7bb34900111::InlineSpiller
170 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()), in InlineSpiller()
262 if (SnipLI.getNumValNums() > 2 || !LIS.intervalIsInOneMBB(SnipLI)) in isSnippet()
314 LiveInterval &SnipLI = LIS.getInterval(SnipReg); in collectRegsToSpill()
352 SlotIndex Idx = LIS.getInstructionIndex(CopyMI); in hoistSpillInsideBB()
359 LiveInterval &SrcLI = LIS.getInterval(SrcReg); in hoistSpillInsideBB()
362 MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(SrcVNI->def); in hoistSpillInsideBB()
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DLiveDebugVariables.cpp134 LiveIntervals &LIS, const TargetInstrInfo &TII);
139 LiveIntervals &LIS);
238 LiveIntervals &LIS, MachineDominatorTree &MDT,
252 LiveIntervals &LIS);
257 LiveIntervals &LIS, MachineDominatorTree &MDT,
263 LiveIntervals &LIS);
271 LiveIntervals &LIS, const TargetInstrInfo &TRI);
285 LiveIntervals *LIS; member in __anonb2ee42a60311::LDVImpl
525 ? LIS->getMBBStartIdx(MBB) in collectDebugValues()
526 : LIS->getInstructionIndex(*std::prev(MBBI)).getRegSlot(); in collectDebugValues()
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DTwoAddressInstructionPass.cpp79 LiveIntervals *LIS; member in __anon1b40b28f0111::TwoAddressInstructionPass
182 static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS);
223 if (LIS) { in sink3AddrInstruction()
224 LiveInterval &LI = LIS->getInterval(SavedReg); in sink3AddrInstruction()
228 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot(); in sink3AddrInstruction()
234 KillMI = LIS->getInstructionFromIndex(I->end); in sink3AddrInstruction()
280 if (MO.isKill() || (LIS && isPlainlyKilled(&OtherMI, MOReg, LIS))) { in sink3AddrInstruction()
293 if (!LIS) { in sink3AddrInstruction()
307 if (LIS) in sink3AddrInstruction()
308 LIS->handleMove(*MI); in sink3AddrInstruction()
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