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Searched refs:MAX_SAMPLES_LOG2 (Results 1 – 6 of 6) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dradv_constants.h45 #define MAX_SAMPLES_LOG2 4 macro
Dradv_private.h499 } clear[MAX_SAMPLES_LOG2];
543 } blit2d[MAX_SAMPLES_LOG2];
602 } rc[MAX_SAMPLES_LOG2];
609 } depth[MAX_SAMPLES_LOG2];
615 } stencil[MAX_SAMPLES_LOG2];
625 } rc[MAX_SAMPLES_LOG2];
633 } depth[MAX_SAMPLES_LOG2];
640 } stencil[MAX_SAMPLES_LOG2];
648 } depth_decomp[MAX_SAMPLES_LOG2];
683 VkPipeline pipeline[MAX_SAMPLES_LOG2];
Dradv_meta_fmask_expand.c186 for (uint32_t i = 0; i < MAX_SAMPLES_LOG2; ++i) { in radv_device_finish_meta_fmask_expand_state()
276 for (uint32_t i = 0; i < MAX_SAMPLES_LOG2; i++) { in radv_device_init_meta_fmask_expand_state()
Dradv_meta_resolve_cs.c474 for (uint32_t i = 0; i < MAX_SAMPLES_LOG2; ++i) { in radv_device_init_meta_resolve_compute_state()
552 for (uint32_t i = 0; i < MAX_SAMPLES_LOG2; ++i) { in radv_device_finish_meta_resolve_compute_state()
Dradv_meta_resolve_fs.c718 for (uint32_t i = 0; i < MAX_SAMPLES_LOG2; ++i) { in radv_device_init_meta_resolve_fragment_state()
771 for (uint32_t i = 0; i < MAX_SAMPLES_LOG2; ++i) { in radv_device_finish_meta_resolve_fragment_state()
Dradv_meta_blit2d.c706 for (unsigned log2_samples = 0; log2_samples < MAX_SAMPLES_LOG2; ++log2_samples) { in radv_device_finish_meta_blit2d_state()
1378 for (unsigned log2_samples = 0; log2_samples < MAX_SAMPLES_LOG2; log2_samples++) { in radv_device_init_meta_blit2d_state()