Home
last modified time | relevance | path

Searched refs:OVF (Results 1 – 15 of 15) sorted by relevance

/external/exoplayer/tree/testdata/src/test/assets/ts/
Dsample_h264_dts_audio.ts36 l+ �S ��^/���SҝN|��9�2�oKH!�ؒ��H�v��n�.E�V3��0��P��CH��<e)�*�SK~���Z�D����2|i?�`OVF�$eה-i#�+�…
Dsample_h264_mpeg_audio.ts36 l+ �S ��^/���SҝN|��9�2�oKH!�ؒ��H�v��n�.E�V3��0��P��CH��<e)�*�SK~���Z�D����2|i?�`OVF�$eה-i#�+�…
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeIntegerTypes.cpp2324 SDValue OVF = Lo.getValue(1); in ExpandIntRes_ADDSUB() local
2328 OVF = DAG.getNode(ISD::AND, dl, OvfVT, DAG.getConstant(1, dl, OvfVT), OVF); in ExpandIntRes_ADDSUB()
2331 OVF = DAG.getZExtOrTrunc(OVF, dl, NVT); in ExpandIntRes_ADDSUB()
2332 Hi = DAG.getNode(N->getOpcode(), dl, NVT, Hi, OVF); in ExpandIntRes_ADDSUB()
2335 OVF = DAG.getSExtOrTrunc(OVF, dl, NVT); in ExpandIntRes_ADDSUB()
2336 Hi = DAG.getNode(RevOpc, dl, NVT, Hi, OVF); in ExpandIntRes_ADDSUB()
/external/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.td129 // Fake register to represent USR.OVF bit. Artihmetic/saturating instruc-
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp873 SDValue OVF = DAG.getNode(ovf, DL, VT, Lo, Hi); in LowerUADDSUBO() local
875 OVF = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, OVF, in LowerUADDSUBO()
880 return DAG.getNode(ISD::MERGE_VALUES, DL, DAG.getVTList(VT, VT), Res, OVF); in LowerUADDSUBO()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp878 SDValue OVF = DAG.getNode(ovf, DL, VT, Lo, Hi); in LowerUADDSUBO() local
880 OVF = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, OVF, in LowerUADDSUBO()
885 return DAG.getNode(ISD::MERGE_VALUES, DL, DAG.getVTList(VT, VT), Res, OVF); in LowerUADDSUBO()
/external/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp1047 SDValue OVF = DAG.getNode(ovf, DL, VT, Lo, Hi); in LowerUADDSUBO() local
1049 OVF = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, OVF, in LowerUADDSUBO()
1054 return DAG.getNode(ISD::MERGE_VALUES, DL, DAG.getVTList(VT, VT), Res, OVF); in LowerUADDSUBO()
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DLegalizeIntegerTypes.cpp2581 SDValue OVF = Lo.getValue(1); in ExpandIntRes_ADDSUB() local
2585 OVF = DAG.getNode(ISD::AND, dl, OvfVT, DAG.getConstant(1, dl, OvfVT), OVF); in ExpandIntRes_ADDSUB()
2588 OVF = DAG.getZExtOrTrunc(OVF, dl, NVT); in ExpandIntRes_ADDSUB()
2589 Hi = DAG.getNode(N->getOpcode(), dl, NVT, Hi, OVF); in ExpandIntRes_ADDSUB()
2592 OVF = DAG.getSExtOrTrunc(OVF, dl, NVT); in ExpandIntRes_ADDSUB()
2593 Hi = DAG.getNode(RevOpc, dl, NVT, Hi, OVF); in ExpandIntRes_ADDSUB()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.td122 // Fake register to represent USR.OVF bit. Arithmetic/saturating instruc-
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeIntegerTypes.cpp1777 SDValue OVF = Lo.getValue(1); in ExpandIntRes_ADDSUB() local
1781 OVF = DAG.getNode(ISD::AND, dl, NVT, DAG.getConstant(1, dl, NVT), OVF); in ExpandIntRes_ADDSUB()
1784 Hi = DAG.getNode(N->getOpcode(), dl, NVT, Hi, OVF); in ExpandIntRes_ADDSUB()
1787 Hi = DAG.getNode(RevOpc, dl, NVT, Hi, OVF); in ExpandIntRes_ADDSUB()
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.td136 // Fake register to represent USR.OVF bit. Arithmetic/saturating instruc-
/external/libaom/libaom/av1/encoder/
Dencoder.c1758 #define HIGHBD_OBFP(BT, OSDF, OVF, OSVF) \ argument
1760 cpi->fn_ptr[BT].ovf = OVF; \
3380 #define OBFP(BT, OSDF, OVF, OSVF) \ in av1_create_compressor() argument
3382 cpi->fn_ptr[BT].ovf = OVF; \ in av1_create_compressor()
/external/cldr/tools/java/org/unicode/cldr/util/data/external/
D2013-1_UNLOCODE_CodeListPart2.csv3794 "+","GB","OVF","Ovenden","Ovenden","DNC","--3-----","RL","1301",,"5344N 00153W",
D2013-1_UNLOCODE_CodeListPart3.csv11938 ,"US","OVF","Camptonville","Camptonville","CA","--3-----","RL","0901",,"3927N 12102W",
D2013-1_UNLOCODE_CodeListPart1.csv29978 ,"ES","OVF","Oliva de la Frontera","Oliva de la Frontera",,"--3-----","RL","0212",,"3816N 00655W",