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Searched refs:PHY_REG0 (Results 1 – 2 of 2) sorted by relevance

/external/arm-trusted-firmware/plat/brcm/board/stingray/driver/
Dswreg.c35 #define PHY_REG0 0x0 macro
180 cmd = BSTI_CMD(0x1, BSTI_READ, reg_id, addr, BSTI_COMMAND_TA, PHY_REG0); in read_swreg_config()
200 ret = read_swreg_config(reg_id, PHY_REG0, &read_data); in swreg_config_done()
206 ret = write_swreg_config(reg_id, PHY_REG0, read_data); in swreg_config_done()
210 ret = read_swreg_config(reg_id, PHY_REG0, &read_data); in swreg_config_done()
215 ret = write_swreg_config(reg_id, PHY_REG0, read_data); in swreg_config_done()
271 ret = write_swreg_config(reg_id, PHY_REG0, in set_swreg()
276 ret = write_swreg_config(reg_id, PHY_REG0, in set_swreg()
/external/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/
Dddr_rk3368.c125 uint32_t PHY_REG0; member
315 p_ddr_reg->phy.PHY_REG0 = mmio_read_32(DDR_PHY_BASE + DDR_PHY_REG0); in ddr_reg_save()