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Searched refs:PWR_CR3_RRS (Results 1 – 3 of 3) sorted by relevance

/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_pwr_ex.c736 SET_BIT(PWR->CR3, PWR_CR3_RRS); in HAL_PWREx_EnableSRAM2ContentRetention()
748 CLEAR_BIT(PWR->CR3, PWR_CR3_RRS); in HAL_PWREx_DisableSRAM2ContentRetention()
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_pwr_ex.c736 SET_BIT(PWR->CR3, PWR_CR3_RRS); in HAL_PWREx_EnableSRAM2ContentRetention()
748 CLEAR_BIT(PWR->CR3, PWR_CR3_RRS); in HAL_PWREx_DisableSRAM2ContentRetention()
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
Dstm32l476xx.h9677 #define PWR_CR3_RRS PWR_CR3_RRS_Msk /*!< SRAM2 Retention… macro