Searched refs:RCC_PLLNCFGR1_DIVM_MASK (Results 1 – 2 of 2) sorted by relevance
321 #define RCC_PLLNCFGR1_DIVM_MASK GENMASK(21, 16) macro
779 divm = (cfgr1 & (RCC_PLLNCFGR1_DIVM_MASK)) >> RCC_PLLNCFGR1_DIVM_SHIFT; in stm32mp1_pll_get_fvco()1410 RCC_PLLNCFGR1_DIVM_MASK; in stm32mp1_check_pll_conf()1545 RCC_PLLNCFGR1_DIVM_MASK; in stm32mp1_pll_config()