| /external/llvm-project/lld/test/COFF/ |
| D | linkrepro.test | 13 # RUN: FileCheck %s --check-prefix=RSP < repro/response.txt
21 # RUN: FileCheck %s --check-prefix=RSP < repro2/response.txt
29 # RUN: FileCheck %s --check-prefix=RSP < repro/response.txt
37 # RUN: FileCheck %s --check-prefix=RSP < repro/response.txt
45 # RUN: FileCheck %s --check-prefix=RSP < repro/response.txt
47 # RSP: /subsystem:console
48 # RSP: /entry:main@0
49 # RSP-NOT: /linkrepro:
50 # RSP: /out:
51 # RSP: linkrepro.test.tmp.obj
[all …]
|
| D | linkrepro-res.test | 10 # RUN: FileCheck %s --check-prefix=RSP < repro/response.txt
12 # RSP: resource.res
|
| /external/libffi/src/x86/ |
| D | win64_intel.S | 52 mov RAX, [RSP] ; movq (%rsp), %rax
61 mov RSP, arg0 ; movq arg0, %rsp
66 mov RCX, [RSP] ; movq (%rsp), %rcx
67 movsd XMM0, qword ptr [RSP] ; movsd (%rsp), %xmm0
68 mov RDX, [RSP + 8] ;movq 8(%rsp), %rdx
69 movsd XMM1, qword ptr [RSP + 8]; movsd 8(%rsp), %xmm1
70 mov R8, [RSP + 16] ; movq 16(%rsp), %r8
71 movsd XMM2, qword ptr [RSP + 16] ; movsd 16(%rsp), %xmm2
72 mov R9, [RSP + 24] ; movq 24(%rsp), %r9
73 movsd XMM3, qword ptr [RSP + 24] ;movsd 24(%rsp), %xmm3
|
| /external/llvm-project/lld/test/ELF/ |
| D | reproduce-error.s | 8 # RUN: tar xOf repro.tar repro/response.txt | FileCheck --check-prefix=RSP %s
9 # RSP: abc
10 # RSP: -o t
|
| /external/llvm/test/CodeGen/X86/ |
| D | statepoint-stackmap-format.ll | 127 ; Indirect Spill Slot [RSP+0]
147 ; Indirect Spill Slot [RSP+16]
152 ; Indirect Spill Slot [RSP+8]
157 ; Indirect Spill Slot [RSP+16]
162 ; Indirect Spill Slot [RSP+16]
194 ; Indirect Spill Slot [RSP+0]
214 ; Indirect Spill Slot [RSP+16]
219 ; Indirect Spill Slot [RSP+8]
224 ; Indirect Spill Slot [RSP+16]
229 ; Indirect Spill Slot [RSP+16]
|
| /external/llvm-project/lld/test/wasm/ |
| D | reproduce.ll | 15 ; RUN: FileCheck --check-prefix=RSP %s < repro/response.txt
17 ; RSP: -o {{.*}}out.wasm
18 ; RSP: {{.*}}/foo.o
|
| /external/llvm-project/llvm/test/MC/X86/ |
| D | intel-syntax-2.s | 6 mov DWORD PTR [RSP - 4], 257
13 mov DWORD PTR [RSP - 4], 255
|
| D | intel-syntax.s | 73 mov DWORD PTR [RSP - 4], 257
75 mov DWORD PTR [RSP + 4], 258
77 mov QWORD PTR [RSP - 16], 123
79 mov BYTE PTR [RSP - 17], 97
81 mov EAX, DWORD PTR [RSP - 4]
83 mov RAX, QWORD PTR [RSP]
87 mov DWORD PTR [RSP - 4], -4
91 mov EAX, DWORD PTR [RSP + 4*RAX - 24]
|
| /external/llvm/test/MC/X86/ |
| D | intel-syntax-2.s | 6 mov DWORD PTR [RSP - 4], 257
13 mov DWORD PTR [RSP - 4], 255
|
| D | intel-syntax.s | 11 mov DWORD PTR [RSP - 4], 257
13 mov DWORD PTR [RSP + 4], 258
15 mov QWORD PTR [RSP - 16], 123
17 mov BYTE PTR [RSP - 17], 97
19 mov EAX, DWORD PTR [RSP - 4]
21 mov RAX, QWORD PTR [RSP]
23 mov DWORD PTR [RSP - 4], -4
27 mov EAX, DWORD PTR [RSP + 4*RAX - 24]
|
| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | statepoint-stackmap-format.ll | 192 ; Indirect Spill Slot [RSP+0]
220 ; Indirect Spill Slot [RSP+16]
227 ; Indirect Spill Slot [RSP+8]
234 ; Indirect Spill Slot [RSP+16]
241 ; Indirect Spill Slot [RSP+16]
279 ; Indirect Spill Slot [RSP+0]
307 ; Indirect Spill Slot [RSP+16]
314 ; Indirect Spill Slot [RSP+8]
321 ; Indirect Spill Slot [RSP+16]
328 ; Indirect Spill Slot [RSP+16]
[all …]
|
| /external/swiftshader/third_party/marl/src/ |
| D | osfiber_asm_x64.h | 50 uintptr_t RSP; member
72 static_assert(offsetof(marl_fiber_context, RSP) == MARL_REG_RSP,
|
| D | osfiber_x64.c | 36 ctx->RSP = (uintptr_t)&stack_top[-3]; in marl_fiber_set_target()
|
| /external/llvm-project/llvm/test/MC/AsmParser/ |
| D | directive_seh.s | 69 sub RSP, 24
72 mov [16+RSP], RSI
77 movups [RSP], XMM8
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | FixupStatepointCallerSaved.cpp | 183 RegSlotPair RSP(Reg, FI); in recordReload() local
184 auto Res = Reloads[MBB].insert(RSP); in recordReload()
191 RegSlotPair RSP(Reg, FI); in hasReload() local
192 return Reloads.count(MBB) && Reloads[MBB].count(RSP); in hasReload()
245 for (auto &RSP : GlobalIndices[EHPad]) in reset() local
246 ReservedSlots.insert(RSP.second); in reset()
256 Vec, [Reg](RegSlotPair &RSP) { return Reg == RSP.first; }); in getFrameIndex() argument
|
| /external/llvm-project/llvm/unittests/tools/llvm-exegesis/X86/ |
| D | TargetTest.cpp | 84 ElementsAre(IsReg(X86::RSP), IsImm(1), IsReg(0), IsImm(Offset), in IsMovValueToStack()
90 ElementsAre(IsReg(Reg), IsReg(X86::RSP), IsImm(1), IsReg(0), in IsMovValueFromStack()
96 ElementsAre(IsReg(X86::RSP), IsReg(X86::RSP), IsImm(Size))); in IsStackAllocate()
101 ElementsAre(IsReg(X86::RSP), IsReg(X86::RSP), IsImm(Size))); in IsStackDeallocate()
|
| /external/llvm-project/llvm/test/tools/llvm-dwarfdump/X86/ |
| D | debug_loclists.s | 30 # REGULAR-NEXT: [0x0000000000000007, 0x0000000000000008): DW_OP_reg7 RSP
31 # VERBOSE-NEXT: [0x0000000000000007, 0x0000000000000008) ".text": DW_OP_reg7 RSP
59 # REGULAR-NEXT: [0x0000000000000007, 0x0000000000000008): DW_OP_reg7 RSP
61 # VERBOSE-NEXT: => [0x0000000000000007, 0x0000000000000008) ".text": DW_OP_reg7 RSP
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 109 X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::RBP, X86::RSP, in initLLVMToSEHAndCVRegMapping()
187 unsigned StackPtr = is64Bit ? X86::RSP : X86::ESP; in createX86MCAsmInfo()
291 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: in getX86SubSuperRegisterOrZero()
319 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: in getX86SubSuperRegisterOrZero()
356 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: in getX86SubSuperRegisterOrZero()
392 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: in getX86SubSuperRegisterOrZero()
428 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: in getX86SubSuperRegisterOrZero()
429 return X86::RSP; in getX86SubSuperRegisterOrZero()
|
| /external/llvm-project/llvm/test/DebugInfo/X86/ |
| D | asan_debug_info.ll | 18 ; [0x000000000000006d, 0x00000000000000a4): DW_OP_breg7 RSP+16, DW_OP_deref, DW_OP_plus_uc…
19 ; [0x00000000000000a6, 0x00000000000000ef): DW_OP_breg7 RSP+16, DW_OP_deref, DW_OP_plus_uc…
34 ; CHECK-NEXT: DW_AT_location (DW_OP_breg7 RSP+32, DW_OP_plus_uconst 0x20)
|
| /external/llvm-project/llvm/tools/llvm-exegesis/lib/X86/ |
| D | Target.cpp | 441 .addReg(X86::RSP) in allocateStackSpace()
442 .addReg(X86::RSP) in allocateStackSpace()
451 .addReg(X86::RSP) // BaseReg in fillStackSpace()
465 .addReg(X86::RSP) // BaseReg in loadToReg()
475 .addReg(X86::RSP) in releaseStackSpace()
476 .addReg(X86::RSP) in releaseStackSpace()
527 .addReg(X86::RSP) // BaseReg in loadX87STAndFinalize()
543 .addReg(X86::RSP) // BaseReg in loadX87FPAndFinalize()
564 .addReg(X86::RSP) // BaseReg in loadImplicitRegAndFinalize()
|
| /external/strace/linux/x86_64/ |
| D | arch_regs.h | 24 #define RSP 19 macro
|
| D | userent.h | 20 XLAT(8*RSP),
|
| /external/llvm/test/DebugInfo/COFF/ |
| D | local-variables.ll | 30 ; ASM: #DEBUG_VALUE: f:param <- [%RSP+52]
38 ; ASM: #DEBUG_VALUE: f:param <- [%RSP+52]
39 ; ASM: #DEBUG_VALUE: a <- [%RSP+40]
52 ; ASM: #DEBUG_VALUE: f:param <- [%RSP+52]
53 ; ASM: #DEBUG_VALUE: b <- [%RSP+36]
|
| /external/kernel-headers/original/uapi/asm-x86/asm/ |
| D | ptrace-abi.h | 58 #define RSP 152 macro
|
| /external/capstone/suite/MC/X86/ |
| D | intel-syntax-encoding.s.cs | 11 0x48,0x89,0x44,0x24,0xf0 = mov QWORD PTR [RSP - 16], RAX
|