/external/vixl/benchmarks/aarch64/ |
D | bench-utils.cc | 206 __ Rbit(PickR(size), PickR(size)); in GenerateTrivialSequence() local
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/external/vixl/test/aarch32/ |
D | test-macro-assembler-cond-rd-rn-a32.cc | 57 M(Rbit) \
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D | test-macro-assembler-cond-rd-rn-t32.cc | 57 M(Rbit) \
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D | test-simulator-cond-rd-rn-t32.cc | 117 M(Rbit) \
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D | test-simulator-cond-rd-rn-a32.cc | 117 M(Rbit) \
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/external/swiftshader/third_party/subzero/src/ |
D | IceInstARM32.h | 411 Rbit, enumerator 1056 using InstARM32Rbit = InstARM32UnaryopGPR<InstARM32::Rbit, false>;
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D | IceInstARM32.cpp | 3531 template class InstARM32UnaryopGPR<InstARM32::Rbit, false>;
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/external/vixl/test/aarch64/ |
D | test-disasm-sve-aarch64.cc | 5867 COMPARE_MACRO(Rbit(z22.VnB(), p2.Merging(), z24.VnB()), in TEST() 5869 COMPARE_MACRO(Rbit(z22.VnH(), p2.Merging(), z24.VnH()), in TEST() 5871 COMPARE_MACRO(Rbit(z22.VnS(), p2.Merging(), z24.VnS()), in TEST() 5873 COMPARE_MACRO(Rbit(z22.VnD(), p2.Merging(), z24.VnD()), in TEST()
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D | test-assembler-sve-aarch64.cc | 13653 __ Rbit(z0.VnB(), p1.Merging(), z0.VnB()); in TEST_SVE() local 13654 __ Rbit(z0.VnB(), p1.Merging(), z0.VnB()); in TEST_SVE() local 13656 __ Rbit(z1.VnB(), p1.Merging(), z0.VnB()); in TEST_SVE() local 13657 __ Rbit(z2.VnH(), p1.Merging(), z0.VnH()); in TEST_SVE() local 13658 __ Rbit(z3.VnS(), p1.Merging(), z0.VnS()); in TEST_SVE() local 13659 __ Rbit(z4.VnD(), p1.Merging(), z0.VnD()); in TEST_SVE() local 13662 __ Rbit(z5.VnB(), p2.Merging(), z0.VnB()); in TEST_SVE() local 13664 __ Rbit(z6.VnS(), p2.Merging(), z0.VnS()); in TEST_SVE() local
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D | test-disasm-neon-aarch64.cc | 3468 COMPARE_MACRO(Rbit(v1.V8B(), v8.V8B()), in TEST() 3471 COMPARE_MACRO(Rbit(v2.V16B(), v9.V16B()), in TEST()
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D | test-assembler-neon-aarch64.cc | 6894 __ Rbit(v28.V8B(), v1.V8B()); in TEST() local 6895 __ Rbit(v29.V16B(), v1.V16B()); in TEST() local
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D | test-assembler-aarch64.cc | 1503 __ Rbit(w0, w24); in TEST() local 1504 __ Rbit(x1, x24); in TEST() local
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/external/vixl/src/aarch64/ |
D | macro-assembler-aarch64.h | 2172 void Rbit(const Register& rd, const Register& rn) { in Rbit() function 2879 V(rbit, Rbit) \ 5544 void Rbit(const ZRegister& zd, const PRegisterM& pg, const ZRegister& zn) { in Rbit() function
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/external/vixl/src/aarch32/ |
D | macro-assembler-aarch32.h | 3054 void Rbit(Condition cond, Register rd, Register rm) { in Rbit() function 3063 void Rbit(Register rd, Register rm) { Rbit(al, rd, rm); } in Rbit() function
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