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Searched refs:SSE4_2 (Results 1 – 14 of 14) sorted by relevance

/external/tensorflow/tensorflow/core/platform/
Dcpu_feature_guard.cc76 CheckFeatureOrDie(CPUFeature::SSE4_2, "SSE4.2"); in CPUFeatureGuard()
126 CheckIfFeatureUnused(CPUFeature::SSE4_2, "SSE4.2", missing_instructions); in InfoAboutUnusedCPUFeatures()
Dcpu_info.h80 SSE4_2 = 6, enumerator
Dcpu_info.cc244 case SSE4_2: return cpuid->have_sse4_2_; in TestFeature()
/external/igt-gpu-tools/lib/
Digt_x86.h39 #define SSE4_2 0x40 macro
Digt_x86.c125 features |= SSE4_2; in igt_x86_features()
178 if (features & SSE4_2) in igt_x86_features_to_string()
/external/compiler-rt/lib/scudo/
Dscudo_utils.h34 SSE4_2 = 0, enumerator
Dscudo_utils.cpp94 case SSE4_2: in testCPUFeature()
Dscudo_allocator.cpp289 CHECK(testCPUFeature(SSE4_2)); // for crc32 in init()
/external/libaom/libaom/test/
Dhash_test.cc129 SSE4_2, AV1Crc32cHashTest,
/external/libaom/libaom/build/cmake/
Dcpu.cmake70 set(X86_FLAVORS "MMX;SSE;SSE2;SSE3;SSSE3;SSE4_1;SSE4_2;AVX;AVX2")
Daom_config_defaults.cmake189 "Enables SSE4_2 optimizations on x86/x86_64 targets." ON)
/external/llvm-project/llvm/include/llvm/Support/
DX86TargetParser.def111 X86_FEATURE_COMPAT(SSE4_2, "sse4.2")
/external/adhd/cras/
Dconfigure.ac150 # SSE4_2 support
/external/clang/lib/CodeGen/
DCGBuiltin.cpp6771 SSE4_2, in EmitX86BuiltinExpr() enumerator
6803 .Case("sse4.2", X86Features::SSE4_2) in EmitX86BuiltinExpr()