Home
last modified time | relevance | path

Searched refs:VP9_ADDBLK_ST8x4_UB (Results 1 – 5 of 5) sorted by relevance

/external/libvpx/libvpx/vpx_dsp/mips/
Didct8x8_msa.c37 VP9_ADDBLK_ST8x4_UB(dst, dst_stride, in0, in1, in2, in3); in vpx_idct8x8_64_add_msa()
39 VP9_ADDBLK_ST8x4_UB(dst, dst_stride, in4, in5, in6, in7); in vpx_idct8x8_64_add_msa()
98 VP9_ADDBLK_ST8x4_UB(dst, dst_stride, in0, in1, in2, in3); in vpx_idct8x8_12_add_msa()
100 VP9_ADDBLK_ST8x4_UB(dst, dst_stride, in4, in5, in6, in7); in vpx_idct8x8_12_add_msa()
114 VP9_ADDBLK_ST8x4_UB(dst, dst_stride, vec, vec, vec, vec); in vpx_idct8x8_1_add_msa()
116 VP9_ADDBLK_ST8x4_UB(dst, dst_stride, vec, vec, vec, vec); in vpx_idct8x8_1_add_msa()
Didct32x32_msa.c557 VP9_ADDBLK_ST8x4_UB(dst, (4 * dst_stride), m0, m2, m4, m6); in idct8x32_column_butterfly_addblk()
561 VP9_ADDBLK_ST8x4_UB((dst + 19 * dst_stride), (4 * dst_stride), m0, m2, m4, in idct8x32_column_butterfly_addblk()
576 VP9_ADDBLK_ST8x4_UB((dst + 2 * dst_stride), (4 * dst_stride), m1, m3, m5, m7); in idct8x32_column_butterfly_addblk()
580 VP9_ADDBLK_ST8x4_UB((dst + 17 * dst_stride), (4 * dst_stride), m1, m3, m5, in idct8x32_column_butterfly_addblk()
595 VP9_ADDBLK_ST8x4_UB((dst + 1 * dst_stride), (4 * dst_stride), n0, n2, n4, n6); in idct8x32_column_butterfly_addblk()
599 VP9_ADDBLK_ST8x4_UB((dst + 18 * dst_stride), (4 * dst_stride), n0, n2, n4, in idct8x32_column_butterfly_addblk()
614 VP9_ADDBLK_ST8x4_UB((dst + 3 * dst_stride), (4 * dst_stride), n1, n3, n5, n7); in idct8x32_column_butterfly_addblk()
618 VP9_ADDBLK_ST8x4_UB((dst + 16 * dst_stride), (4 * dst_stride), n1, n3, n5, in idct8x32_column_butterfly_addblk()
Didct16x16_msa.c193 VP9_ADDBLK_ST8x4_UB(dst, dst_stride, reg0, reg2, reg4, reg6); in vpx_idct16_1d_columns_addblk_msa()
196 VP9_ADDBLK_ST8x4_UB(dst, dst_stride, reg8, reg10, reg12, reg14); in vpx_idct16_1d_columns_addblk_msa()
199 VP9_ADDBLK_ST8x4_UB(dst, dst_stride, reg3, reg13, reg11, reg5); in vpx_idct16_1d_columns_addblk_msa()
202 VP9_ADDBLK_ST8x4_UB(dst, dst_stride, reg7, reg9, reg1, reg15); in vpx_idct16_1d_columns_addblk_msa()
Dinv_txfm_msa.h93 #define VP9_ADDBLK_ST8x4_UB(dst, dst_stride, in0, in1, in2, in3) \ macro
/external/libvpx/libvpx/vp9/common/mips/msa/
Dvp9_idct8x8_msa.c76 VP9_ADDBLK_ST8x4_UB(dst, dst_stride, in0, in1, in2, in3); in vp9_iht8x8_64_add_msa()
78 VP9_ADDBLK_ST8x4_UB(dst, dst_stride, in4, in5, in6, in7); in vp9_iht8x8_64_add_msa()