| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonExpandCondsets.cpp | 234 LaneBitmask getLaneMask(unsigned Reg, unsigned Sub);
316 LaneBitmask HexagonExpandCondsets::getLaneMask(unsigned Reg, unsigned Sub) { in getLaneMask() function in HexagonExpandCondsets
353 LaneBitmask SLM = getLaneMask(Reg, Op.getSubReg()); in updateKillFlags()
417 LaneBitmask SLM = getLaneMask(DR, DSR); in updateDeadsInRange()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonExpandCondsets.cpp | 199 LaneBitmask getLaneMask(unsigned Reg, unsigned Sub);
288 LaneBitmask HexagonExpandCondsets::getLaneMask(unsigned Reg, unsigned Sub) { in getLaneMask() function in HexagonExpandCondsets
324 LaneBitmask SLM = getLaneMask(Reg, Op.getSubReg()); in updateKillFlags()
379 LaneBitmask SLM = getLaneMask(DR, DSR); in updateDeadsInRange()
|
| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonExpandCondsets.cpp | 201 LaneBitmask getLaneMask(Register Reg, unsigned Sub);
289 LaneBitmask HexagonExpandCondsets::getLaneMask(Register Reg, unsigned Sub) { in getLaneMask() function in HexagonExpandCondsets
325 LaneBitmask SLM = getLaneMask(Reg, Op.getSubReg()); in updateKillFlags()
380 LaneBitmask SLM = getLaneMask(DR, DSR); in updateDeadsInRange()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 231 LaneBitmask getLaneMask() const { in getLaneMask() function
|
| /external/llvm/lib/CodeGen/ |
| D | MachineRegisterInfo.cpp | 431 return TRC.getLaneMask(); in getMaxLaneMaskForVReg()
|
| D | RegisterCoalescer.cpp | 2670 LaneBitmask Mask = DstIdx == 0 ? CP.getNewRC()->getLaneMask() in joinVirtRegs()
2688 LaneBitmask Mask = SrcIdx == 0 ? CP.getNewRC()->getLaneMask() in joinVirtRegs()
|
| D | ScheduleDAGInstrs.cpp | 411 return RC.getLaneMask(); in getLaneMaskForMO()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 203 LaneBitmask getLaneMask() const { in getLaneMask() function
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 203 LaneBitmask getLaneMask() const { in getLaneMask() function
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | MachineRegisterInfo.cpp | 503 return TRC.getLaneMask(); in getMaxLaneMaskForVReg()
|
| D | ScheduleDAGInstrs.cpp | 378 return RC.getLaneMask(); in getLaneMaskForMO()
|
| D | RegisterCoalescer.cpp | 3398 LaneBitmask Mask = DstIdx == 0 ? CP.getNewRC()->getLaneMask() in joinVirtRegs()
3416 LaneBitmask Mask = SrcIdx == 0 ? CP.getNewRC()->getLaneMask() in joinVirtRegs()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachineRegisterInfo.cpp | 503 return TRC.getLaneMask(); in getMaxLaneMaskForVReg()
|
| D | ScheduleDAGInstrs.cpp | 376 return RC.getLaneMask(); in getLaneMaskForMO()
|
| D | RegisterCoalescer.cpp | 3376 LaneBitmask Mask = DstIdx == 0 ? CP.getNewRC()->getLaneMask() in joinVirtRegs()
3394 LaneBitmask Mask = SrcIdx == 0 ? CP.getNewRC()->getLaneMask() in joinVirtRegs()
|