Searched refs:getSpillAlign (Results 1 – 18 of 18) sorted by relevance
| /external/llvm-project/llvm/lib/Target/XCore/ |
| D | XCoreMachineFunctionInfo.cpp | 46 TRI.getSpillAlign(RC), true); in createLRSpillSlot()
60 MFI.CreateStackObject(TRI.getSpillSize(RC), TRI.getSpillAlign(RC), true); in createFPSpillSlot()
73 Align Alignment = TRI.getSpillAlign(RC); in createEHSpillSlot()
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| D | XCoreFrameLowering.cpp | 578 Align Alignment = TRI.getSpillAlign(RC); in processFunctionBeforeFrameFinalized()
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsMachineFunction.cpp | 158 TRI.getSpillSize(RC), TRI.getSpillAlign(RC), false); in createEhDataRegsFI()
172 TRI.getSpillSize(RC), TRI.getSpillAlign(RC), false); in createISRRegFI()
198 TRI.getSpillSize(*RC), TRI.getSpillAlign(*RC), false); in getMoveF64ViaSpillFI()
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| D | MipsSEFrameLowering.cpp | 897 TRI->getSpillAlign(RC), false); in determineCalleeSaves()
913 TRI->getSpillAlign(RC), false); in determineCalleeSaves()
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonVExtract.cpp | 140 Align Alignment = HRI.getSpillAlign(VecRC); in runOnMachineFunction()
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| D | HexagonFrameLowering.cpp | 1715 Align Alignment = std::min(TRI->getSpillAlign(*RC), getStackAlign()); in assignCalleeSavedSpillSlots()
1939 Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); in expandStoreVec2()
1991 Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); in expandLoadVec2()
2035 Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); in expandStoreVec()
2065 Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); in expandLoadVec()
2169 Align A = HRI.getSpillAlign(*RC); in determineCalleeSaves()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SILowerSGPRSpills.cpp | 215 TRI->getSpillAlign(*RC), true); in spillCalleeSavedRegs()
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| D | SIFrameLowering.cpp | 1266 TRI->getSpillAlign(AMDGPU::SGPR_32RegClass), false); in processFunctionBeforeFrameFinalized()
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 289 Align getSpillAlign(const TargetRegisterClass &RC) const { in getSpillAlign() function
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | VirtRegMap.cpp | 95 Align Alignment = TRI->getSpillAlign(*RC); in createSpillSlot()
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| D | RegisterScavenging.cpp | 450 Align NeedAlign = TRI->getSpillAlign(RC); in spill()
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| D | RegAllocFast.cpp | 302 Align Alignment = TRI->getSpillAlign(RC); in getStackSpaceFor()
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| /external/llvm-project/llvm/lib/Target/ARC/ |
| D | ARCFrameLowering.cpp | 443 RegInfo->getSpillAlign(*RC), false); in processFunctionBeforeFrameFinalized()
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| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVFrameLowering.cpp | 692 RegInfo->getSpillAlign(*RC), false); in processFunctionBeforeFrameFinalized()
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMFrameLowering.cpp | 2148 Align Alignment = TRI->getSpillAlign(RC); in determineCalleeSaves()
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 2203 Align Alignment = TRI.getSpillAlign(RC); in addScavengingSpillSlot()
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64FrameLowering.cpp | 2681 Align Alignment = TRI->getSpillAlign(RC); in determineCalleeSaves()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86FrameLowering.cpp | 2383 Align Alignment = TRI->getSpillAlign(*RC); in assignCalleeSavedSpillSlots()
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