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Searched refs:s_min_i32 (Results 1 – 17 of 17) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dmin.ll25 ; GCN: s_min_i32
36 ; GCN: s_min_i32
47 ; GCN: s_min_i32
48 ; GCN: s_min_i32
49 ; GCN: s_min_i32
50 ; GCN: s_min_i32
68 ; GCN: s_min_i32
83 ; SI: s_min_i32
84 ; SI: s_min_i32
85 ; SI: s_min_i32
[all …]
Dsminmax.ll202 ; GCN-DAG: s_min_i32 s{{[0-9]+}}, [[VAL0]], [[VAL1]]
234 ; GCN-DAG: s_min_i32
235 ; GCN-DAG: s_min_i32
236 ; GCN-DAG: s_min_i32
237 ; GCN-DAG: s_min_i32
/external/llvm/test/CodeGen/AMDGPU/
Dmin.ll20 ; SI: s_min_i32
31 ; SI: s_min_i32
42 ; SI: s_min_i32
43 ; SI: s_min_i32
44 ; SI: s_min_i32
45 ; SI: s_min_i32
63 ; SI: s_min_i32
133 ; SI: s_min_i32
144 ; SI: s_min_i32
145 ; SI: s_min_i32
[all …]
Dsminmax.ll157 ; GCN-DAG: s_min_i32 s{{[0-9]+}}, [[VAL0]], [[VAL1]]
189 ; GCN-DAG: s_min_i32
190 ; GCN-DAG: s_min_i32
191 ; GCN-DAG: s_min_i32
192 ; GCN-DAG: s_min_i32
/external/llvm/test/MC/AMDGPU/
Dsop2.s25 s_min_i32 s1, s2, s3 label
/external/llvm-project/llvm/test/MC/AMDGPU/
Dsop2.s33 s_min_i32 s1, s2, s3 label
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSOPInstructions.td432 def S_MIN_I32 : SOP2_32 <"s_min_i32",
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSOPInstructions.td469 def S_MIN_I32 : SOP2_32 <"s_min_i32",
/external/mesa3d/src/amd/compiler/
Daco_instruction_selection.cpp1287 bld.sop2(aco_opcode::s_min_i32, Definition(dst), bld.def(s1, scc), tmp, Operand(1u)); in visit_alu_instr()
1347 emit_sop2_instruction(ctx, instr, aco_opcode::s_min_i32, dst, true); in visit_alu_instr()
2416 … exponent = bld.sop2(aco_opcode::s_min_i32, bld.def(s1), bld.def(s1, scc), Operand(64u), exponent); in visit_alu_instr()
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td218 defm S_MIN_I32 : SOP2_32 <sop2<0x06>, "s_min_i32",
/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
Dgfx8_dasm_all.txt15288 # CHECK: s_min_i32 s5, s1, s2 ; encoding: [0x01,0x02,0x05,0x83]
15291 # CHECK: s_min_i32 s101, s1, s2 ; encoding: [0x01,0x02,0x65,0x83]
15294 # CHECK: s_min_i32 flat_scratch_lo, s1, s2 ; encoding: [0x01,0x02,0x66,0x83]
15297 # CHECK: s_min_i32 flat_scratch_hi, s1, s2 ; encoding: [0x01,0x02,0x67,0x83]
15300 # CHECK: s_min_i32 vcc_lo, s1, s2 ; encoding: [0x01,0x02,0x6a,0x83]
15303 # CHECK: s_min_i32 vcc_hi, s1, s2 ; encoding: [0x01,0x02,0x6b,0x83]
15306 # CHECK: s_min_i32 tba_lo, s1, s2 ; encoding: [0x01,0x02,0x6c,0x83]
15309 # CHECK: s_min_i32 tba_hi, s1, s2 ; encoding: [0x01,0x02,0x6d,0x83]
15312 # CHECK: s_min_i32 tma_lo, s1, s2 ; encoding: [0x01,0x02,0x6e,0x83]
15315 # CHECK: s_min_i32 tma_hi, s1, s2 ; encoding: [0x01,0x02,0x6f,0x83]
[all …]
Dgfx10_dasm_all.txt15395 # GFX10: s_min_i32 exec_hi, s1, s2 ; encoding: [0x01,0x02,0x7f,0x83]
15398 # GFX10: s_min_i32 exec_lo, s1, s2 ; encoding: [0x01,0x02,0x7e,0x83]
15401 # GFX10: s_min_i32 m0, s1, s2 ; encoding: [0x01,0x02,0x7c,0x83]
15404 # GFX10: s_min_i32 s0, -1, s2 ; encoding: [0xc1,0x02,0x00,0x83]
15407 # GFX10: s_min_i32 s0, -4.0, s2 ; encoding: [0xf7,0x02,0x00,0x83]
15410 # GFX10: s_min_i32 s0, 0, s2 ; encoding: [0x80,0x02,0x00,0x83]
15413 # GFX10: s_min_i32 s0, 0.5, s2 ; encoding: [0xf0,0x02,0x00,0x83]
15416 # GFX10: s_min_i32 s0, 0x3f717273, s2 ; encoding: [0xff,0x02,0x00,0x83,0x73,0x72,0x71,0x…
15419 # GFX10: s_min_i32 s0, 0xaf123456, s2 ; encoding: [0xff,0x02,0x00,0x83,0x56,0x34,0x12,0x…
15422 # GFX10: s_min_i32 s0, exec_hi, s2 ; encoding: [0x7f,0x02,0x00,0x83]
[all …]
Dgfx9_dasm_all.txt14091 # CHECK: s_min_i32 s5, s1, s2 ; encoding: [0x01,0x02,0x05,0x83]
14094 # CHECK: s_min_i32 s101, s1, s2 ; encoding: [0x01,0x02,0x65,0x83]
14097 # CHECK: s_min_i32 flat_scratch_lo, s1, s2 ; encoding: [0x01,0x02,0x66,0x83]
14100 # CHECK: s_min_i32 flat_scratch_hi, s1, s2 ; encoding: [0x01,0x02,0x67,0x83]
14103 # CHECK: s_min_i32 vcc_lo, s1, s2 ; encoding: [0x01,0x02,0x6a,0x83]
14106 # CHECK: s_min_i32 vcc_hi, s1, s2 ; encoding: [0x01,0x02,0x6b,0x83]
14109 # CHECK: s_min_i32 m0, s1, s2 ; encoding: [0x01,0x02,0x7c,0x83]
14112 # CHECK: s_min_i32 exec_lo, s1, s2 ; encoding: [0x01,0x02,0x7e,0x83]
14115 # CHECK: s_min_i32 exec_hi, s1, s2 ; encoding: [0x01,0x02,0x7f,0x83]
14118 # CHECK: s_min_i32 s5, s101, s2 ; encoding: [0x65,0x02,0x05,0x83]
[all …]
/external/llvm-project/llvm/docs/AMDGPU/
DAMDGPUAsmGFX7.rst530 …s_min_i32 :ref:`sdst<amdgpu_synid7_sdst32_1>`, :ref:`ssrc0<amdgpu_synid7_…
DAMDGPUAsmGFX8.rst552 …s_min_i32 :ref:`sdst<amdgpu_synid8_sdst32_1>`, :ref:`ssrc0<amdgpu_synid8_…
DAMDGPUAsmGFX9.rst719 …s_min_i32 :ref:`sdst<amdgpu_synid9_sdst32_1>`, :ref:`ssrc0<amdgpu_synid9_…
DAMDGPUAsmGFX10.rst1197 …s_min_i32 :ref:`sdst<amdgpu_synid10_sdst32_1>`, :ref:`ssrc0<amdgpu_synid1…