Home
last modified time | relevance | path

Searched refs:tzcnt (Results 1 – 25 of 26) sorted by relevance

12

/external/llvm/test/CodeGen/X86/
Dlzcnt-tzcnt.ll160 ; CHECK: tzcnt
171 ; CHECK: tzcnt
182 ; CHECK: tzcnt
193 ; CHECK: tzcnt
204 ; CHECK: tzcnt
215 ; CHECK: tzcnt
228 ; CHECK: tzcnt
241 ; CHECK: tzcnt
254 ; CHECK: tzcnt
267 ; CHECK: tzcnt
[all …]
Dvector-tzcnt-128.ll11 ; Just one 32-bit run to make sure we do reasonable things for i64 tzcnt.
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Haswell/
Dresources-bmi1.s34 tzcnt %ax, %cx label
35 tzcnt (%rax), %cx label
37 tzcnt %eax, %ecx label
38 tzcnt (%rax), %ecx label
40 tzcnt %rax, %rcx label
41 tzcnt (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/SkylakeClient/
Dresources-bmi1.s34 tzcnt %ax, %cx label
35 tzcnt (%rax), %cx label
37 tzcnt %eax, %ecx label
38 tzcnt (%rax), %ecx label
40 tzcnt %rax, %rcx label
41 tzcnt (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/SkylakeServer/
Dresources-bmi1.s34 tzcnt %ax, %cx label
35 tzcnt (%rax), %cx label
37 tzcnt %eax, %ecx label
38 tzcnt (%rax), %ecx label
40 tzcnt %rax, %rcx label
41 tzcnt (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Znver1/
Dresources-bmi1.s34 tzcnt %ax, %cx label
35 tzcnt (%rax), %cx label
37 tzcnt %eax, %ecx label
38 tzcnt (%rax), %ecx label
40 tzcnt %rax, %rcx label
41 tzcnt (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Znver2/
Dresources-bmi1.s34 tzcnt %ax, %cx label
35 tzcnt (%rax), %cx label
37 tzcnt %eax, %ecx label
38 tzcnt (%rax), %ecx label
40 tzcnt %rax, %rcx label
41 tzcnt (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Broadwell/
Dresources-bmi1.s34 tzcnt %ax, %cx label
35 tzcnt (%rax), %cx label
37 tzcnt %eax, %ecx label
38 tzcnt (%rax), %ecx label
40 tzcnt %rax, %rcx label
41 tzcnt (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/BtVer2/
Dresources-bmi1.s34 tzcnt %ax, %cx label
35 tzcnt (%rax), %cx label
37 tzcnt %eax, %ecx label
38 tzcnt (%rax), %ecx label
40 tzcnt %rax, %rcx label
41 tzcnt (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Generic/
Dresources-bmi1.s34 tzcnt %ax, %cx label
35 tzcnt (%rax), %cx label
37 tzcnt %eax, %ecx label
38 tzcnt (%rax), %ecx label
40 tzcnt %rax, %rcx label
41 tzcnt (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/BdVer2/
Dresources-bmi1.s34 tzcnt %ax, %cx label
35 tzcnt (%rax), %cx label
37 tzcnt %eax, %ecx label
38 tzcnt (%rax), %ecx label
40 tzcnt %rax, %rcx label
41 tzcnt (%rax), %rcx label
/external/libjpeg-turbo/simd/i386/
Djchuff-sse2.asm305 ; executed as bsf on CPUs that don't support tzcnt (encoding is equivalent to
306 ; rep bsf.) The destination (first) operand of bsf (and tzcnt on some CPUs) is
310 ; invoking tzcnt.
606 tzcnt size, index ; size = # of trailing 0 bits in index
626 tzcnt size, index ; size = # of trailing 0 bits in index
677 tzcnt size, index ; size = # of trailing 0 bits in index
732 { tzcnt size, index }, \
753 { tzcnt size, index }, \
/external/libaom/libaom/third_party/libyuv/source/
Dx86inc.asm1134 ; tzcnt is equivalent to "rep bsf" and is backwards-compatible with bsf.
1135 ; This lets us use tzcnt without bumping the yasm version requirement yet.
1136 %define tzcnt rep bsf
/external/libjpeg-turbo/simd/x86_64/
Djchuff-sse2.asm199 ; executed as bsf on CPUs that don't support tzcnt (encoding is equivalent to
200 ; rep bsf.) The destination (first) operand of bsf (and tzcnt on some CPUs) is
204 ; invoking tzcnt.
510tzcnt nbitsq, index ; nbits = # of trailing 0 bits in index
/external/llvm/lib/Target/X86/
DX86InstrInfo.td2179 "tzcnt{w}\t{$src, $dst|$dst, $src}",
2183 "tzcnt{w}\t{$src, $dst|$dst, $src}",
2188 "tzcnt{l}\t{$src, $dst|$dst, $src}",
2192 "tzcnt{l}\t{$src, $dst|$dst, $src}",
2197 "tzcnt{q}\t{$src, $dst|$dst, $src}",
2201 "tzcnt{q}\t{$src, $dst|$dst, $src}",
/external/capstone/arch/X86/
DX86MappingInsnOp_reduce.inc5740 { /* X86_TZCNT16rm, X86_INS_TZCNT: tzcnt{w} $dst, $src */
5744 { /* X86_TZCNT16rr, X86_INS_TZCNT: tzcnt{w} $dst, $src */
5748 { /* X86_TZCNT32rm, X86_INS_TZCNT: tzcnt{l} $dst, $src */
5752 { /* X86_TZCNT32rr, X86_INS_TZCNT: tzcnt{l} $dst, $src */
5756 { /* X86_TZCNT64rm, X86_INS_TZCNT: tzcnt{q} $dst, $src */
5760 { /* X86_TZCNT64rr, X86_INS_TZCNT: tzcnt{q} $dst, $src */
DX86MappingInsnOp.inc10556 { /* X86_TZCNT16rm, X86_INS_TZCNT: tzcnt{w} $dst, $src */
10560 { /* X86_TZCNT16rr, X86_INS_TZCNT: tzcnt{w} $dst, $src */
10564 { /* X86_TZCNT32rm, X86_INS_TZCNT: tzcnt{l} $dst, $src */
10568 { /* X86_TZCNT32rr, X86_INS_TZCNT: tzcnt{l} $dst, $src */
10572 { /* X86_TZCNT64rm, X86_INS_TZCNT: tzcnt{q} $dst, $src */
10576 { /* X86_TZCNT64rr, X86_INS_TZCNT: tzcnt{q} $dst, $src */
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrInfo.td2390 "tzcnt{w}\t{$src, $dst|$dst, $src}",
2394 "tzcnt{w}\t{$src, $dst|$dst, $src}",
2399 "tzcnt{l}\t{$src, $dst|$dst, $src}",
2403 "tzcnt{l}\t{$src, $dst|$dst, $src}",
2408 "tzcnt{q}\t{$src, $dst|$dst, $src}",
2412 "tzcnt{q}\t{$src, $dst|$dst, $src}",
DX86.td296 def FeatureLZCNTFalseDeps : SubtargetFeature<"false-deps-lzcnt-tzcnt",
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrInfo.td2456 "tzcnt{w}\t{$src, $dst|$dst, $src}",
2460 "tzcnt{w}\t{$src, $dst|$dst, $src}",
2465 "tzcnt{l}\t{$src, $dst|$dst, $src}",
2469 "tzcnt{l}\t{$src, $dst|$dst, $src}",
2474 "tzcnt{q}\t{$src, $dst|$dst, $src}",
2478 "tzcnt{q}\t{$src, $dst|$dst, $src}",
DX86.td319 def FeatureLZCNTFalseDeps : SubtargetFeature<"false-deps-lzcnt-tzcnt",
/external/llvm-project/llvm/test/CodeGen/X86/
Dclz.ll991 ; This is relevant for 32-bit mode without tzcnt
Dvector-tzcnt-256.ll11 ; Just one 32-bit run to make sure we do reasonable things for i64 tzcnt.
Dvector-tzcnt-128.ll15 ; Just one 32-bit run to make sure we do reasonable things for i64 tzcnt.
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenAsmMatcher.inc7770 "e\005tzcnt\006tzcntl\006tzcntq\006tzcntw\005tzmsk\006tzmskl\006tzmskq\007"
25066 …{ 7864 /* tzcnt */, X86::TZCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
25067 …{ 7864 /* tzcnt */, X86::TZCNT16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }…
25068 …{ 7864 /* tzcnt */, X86::TZCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25069 …{ 7864 /* tzcnt */, X86::TZCNT32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }…
25070 …{ 7864 /* tzcnt */, X86::TZCNT64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
25071 …{ 7864 /* tzcnt */, X86::TZCNT64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }…

12