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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DMachineValueType.h123 v16f16 = 68, // 16 x f16 enumerator
359 return (SimpleTy == MVT::v16f16 || SimpleTy == MVT::v8f32 || in is256BitVector()
512 case v16f16: in getVectorElementType()
590 case v16f16: in getVectorNumElements()
781 case v16f16: in getSizeInBits()
989 if (NumElements == 16) return MVT::v16f16; in getVectorVT()
/external/llvm-project/llvm/include/llvm/Support/
DMachineValueType.h127 v16f16 = 72, // 16 x f16 enumerator
390 return (SimpleTy == MVT::v16f16 || SimpleTy == MVT::v16bf16 || in is256BitVector()
584 case v16f16: in getVectorElementType()
698 case v16f16: in getVectorNumElements()
915 case v16f16: in getSizeInBits()
1179 if (NumElements == 16) return MVT::v16f16; in getVectorVT()
/external/llvm-project/libclc/generic/include/math/
Dbinary_intrin.inc25 _CLC_OVERLOAD half16 __CLC_FUNCTION(half16, half16) __asm(__CLC_INTRINSIC ".v16f16");
Dunary_intrin.inc25 _CLC_OVERLOAD half16 __CLC_FUNCTION(half16 d) __asm(__CLC_INTRINSIC ".v16f16");
Dternary_intrin.inc25 _CLC_OVERLOAD half16 __CLC_FUNCTION(half16, half16, half16) __asm(__CLC_INTRINSIC ".v16f16");
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve-fixed-length-fp-rounding.ll53 %res = call <16 x half> @llvm.ceil.v16f16(<16 x half> %op)
300 %res = call <16 x half> @llvm.floor.v16f16(<16 x half> %op)
547 %res = call <16 x half> @llvm.nearbyint.v16f16(<16 x half> %op)
794 %res = call <16 x half> @llvm.rint.v16f16(<16 x half> %op)
1041 %res = call <16 x half> @llvm.round.v16f16(<16 x half> %op)
1288 %res = call <16 x half> @llvm.trunc.v16f16(<16 x half> %op)
1509 declare <16 x half> @llvm.ceil.v16f16(<16 x half>)
1528 declare <16 x half> @llvm.floor.v16f16(<16 x half>)
1547 declare <16 x half> @llvm.nearbyint.v16f16(<16 x half>)
1566 declare <16 x half> @llvm.rint.v16f16(<16 x half>)
[all …]
Dsve-fixed-length-fp-reduce.ll54 %res = call half @llvm.vector.reduce.fadd.v16f16(half %start, <16 x half> %op)
280 %res = call fast half @llvm.vector.reduce.fadd.v16f16(half %start, <16 x half> %op)
515 %res = call half @llvm.vector.reduce.fmax.v16f16(<16 x half> %op)
732 %res = call half @llvm.vector.reduce.fmin.v16f16(<16 x half> %op)
924 declare half @llvm.vector.reduce.fadd.v16f16(half, <16 x half>)
945 declare half @llvm.vector.reduce.fmax.v16f16(<16 x half>)
966 declare half @llvm.vector.reduce.fmin.v16f16(<16 x half>)
Dvecreduce-fadd.ll232 %r = call fast half @llvm.vector.reduce.fadd.f16.v16f16(half -0.0, <16 x half> %bin.rdx)
275 declare half @llvm.vector.reduce.fadd.f16.v16f16(half, <16 x half>)
Dsve-fixed-length-fp-minmax.ll55 %res = call <16 x half> @llvm.maxnum.v16f16(<16 x half> %op1, <16 x half> %op2)
335 %res = call <16 x half> @llvm.minnum.v16f16(<16 x half> %op1, <16 x half> %op2)
587 declare <16 x half> @llvm.minnum.v16f16(<16 x half>, <16 x half>)
606 declare <16 x half> @llvm.maxnum.v16f16(<16 x half>, <16 x half>)
Dsve-fixed-length-fp-arith.ll581 %res = call <16 x half> @llvm.fma.v16f16(<16 x half> %op1, <16 x half> %op2, <16 x half> %op3)
1291 %res = call <16 x half> @llvm.sqrt.v16f16(<16 x half> %op)
1717 declare <16 x half> @llvm.fma.v16f16(<16 x half>, <16 x half>, <16 x half>)
1736 declare <16 x half> @llvm.sqrt.v16f16(<16 x half>)
/external/llvm-project/llvm/test/CodeGen/X86/
Davx512-masked_memop-16-8.ll356 …%res = call <16 x half> @llvm.masked.load.v16f16(<16 x half>* %addr, i32 4, <16 x i1>%mask, <16 x …
359 declare <16 x half> @llvm.masked.load.v16f16(<16 x half>*, i32, <16 x i1>, <16 x half>)
490 …call void @llvm.masked.store.v16f16.p0v16f16(<16 x half> %val, <16 x half>* %addr, i32 4, <16 x i1…
493 declare void @llvm.masked.store.v16f16.p0v16f16(<16 x half>, <16 x half>*, i32, <16 x i1>)
Dvector-half-conversions.ll135 …%2 = call <16 x float> @llvm.experimental.constrained.fpext.v16f32.v16f16(<16 x half> %1, metadata…
138 declare <16 x float> @llvm.experimental.constrained.fpext.v16f32.v16f16(<16 x half>, metadata) stri…
/external/llvm-project/llvm/test/CodeGen/Thumb2/
Dmve-vecreduce-fadd.ll192 %z = call fast half @llvm.vector.reduce.fadd.f16.v16f16(half %y, <16 x half> %x)
348 %z = call half @llvm.vector.reduce.fadd.f16.v16f16(half %y, <16 x half> %x)
393 declare half @llvm.vector.reduce.fadd.f16.v16f16(half, <16 x half>)
Dmve-vecreduce-fmul.ll192 %z = call fast half @llvm.vector.reduce.fmul.f16.v16f16(half %y, <16 x half> %x)
364 %z = call half @llvm.vector.reduce.fmul.f16.v16f16(half %y, <16 x half> %x)
409 declare half @llvm.vector.reduce.fmul.f16.v16f16(half, <16 x half>)
Dmve-vecreduce-fminmax.ll173 %z = call fast half @llvm.vector.reduce.fmin.v16f16(<16 x half> %x)
355 %z = call half @llvm.vector.reduce.fmin.v16f16(<16 x half> %x)
613 %z = call fast half @llvm.vector.reduce.fmin.v16f16(<16 x half> %x)
867 %z = call half @llvm.vector.reduce.fmin.v16f16(<16 x half> %x)
1087 %z = call fast half @llvm.vector.reduce.fmax.v16f16(<16 x half> %x)
1269 %z = call half @llvm.vector.reduce.fmax.v16f16(<16 x half> %x)
1527 %z = call fast half @llvm.vector.reduce.fmax.v16f16(<16 x half> %x)
1781 %z = call half @llvm.vector.reduce.fmax.v16f16(<16 x half> %x)
1846 declare half @llvm.vector.reduce.fmax.v16f16(<16 x half>)
1850 declare half @llvm.vector.reduce.fmin.v16f16(<16 x half>)
Dmve-gather-ptrs.ll897 declare <16 x half> @llvm.masked.gather.v16f16.v16p0f16(<16 x half*>, i32, <16 x i1>, <16 x half>)
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DValueTypes.td95 def v16f16 : ValueType<256, 68>; // 8 x f16 vector value
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DValueTypes.cpp213 case MVT::v16f16: return VectorType::get(Type::getHalfTy(Context), 16); in getTypeForEVT()
/external/llvm-project/llvm/test/Analysis/CostModel/ARM/
Dmve-gather-scatter-cost.ll12 …t of 544 for instruction: %V16F16 = call <16 x half> @llvm.masked.gather.v16f16.v16p0f16(<16 x hal…
42 …%V16F16 = call <16 x half> @llvm.masked.gather.v16f16.v16p0f16(<16 x half*> undef, i32 2, <16 x i1…
79 …an estimated cost of 544 for instruction: call void @llvm.masked.scatter.v16f16.v16p0f16(<16 x hal…
108 …call void @llvm.masked.scatter.v16f16.v16p0f16(<16 x half> undef, <16 x half*> undef, i32 2, <16 x…
585 declare <16 x half> @llvm.masked.gather.v16f16.v16p0f16(<16 x half*>, i32, <16 x i1>, <16 x half>)
618 declare void @llvm.masked.scatter.v16f16.v16p0f16(<16 x half>, <16 x half*>, i32, <16 x i1>)
Dcast_ldst.ll2749 …t of 1 for instruction: %loadv16f16 = call <16 x half> @llvm.masked.load.v16f16.p0v16f16(<16 x hal…
2772 …t of 1 for instruction: %loadv16f16 = call <16 x half> @llvm.masked.load.v16f16.p0v16f16(<16 x hal…
2795 …t of 1 for instruction: %loadv16f16 = call <16 x half> @llvm.masked.load.v16f16.p0v16f16(<16 x hal…
2818 …t of 1 for instruction: %loadv16f16 = call <16 x half> @llvm.masked.load.v16f16.p0v16f16(<16 x hal…
2841 …t of 1 for instruction: %loadv16f16 = call <16 x half> @llvm.masked.load.v16f16.p0v16f16(<16 x hal…
2864 …t of 1 for instruction: %loadv16f16 = call <16 x half> @llvm.masked.load.v16f16.p0v16f16(<16 x hal…
2887 …t of 1 for instruction: %loadv16f16 = call <16 x half> @llvm.masked.load.v16f16.p0v16f16(<16 x hal…
2910 …t of 1 for instruction: %loadv16f16 = call <16 x half> @llvm.masked.load.v16f16.p0v16f16(<16 x hal…
2933 …t of 1 for instruction: %loadv16f16 = call <16 x half> @llvm.masked.load.v16f16.p0v16f16(<16 x hal…
2955 …%loadv16f16 = call <16 x half> @llvm.masked.load.v16f16.p0v16f16(<16 x half>* undef, i32 2, <16 x…
[all …]
/external/llvm-project/llvm/include/llvm/CodeGen/
DValueTypes.td100 def v16f16 : ValueType<256, 72>; // 16 x f16 vector value
/external/llvm-project/llvm/lib/CodeGen/
DValueTypes.cpp312 case MVT::v16f16: in getTypeForEVT()
/external/llvm-project/llvm/utils/TableGen/
DCodeGenTarget.cpp138 case MVT::v16f16: return "MVT::v16f16"; in getEnumName()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp179 setLoadExtAction(ISD::EXTLOAD, MVT::v16f32, MVT::v16f16, Expand); in AMDGPUTargetLowering()
192 setLoadExtAction(ISD::EXTLOAD, MVT::v16f64, MVT::v16f16, Expand); in AMDGPUTargetLowering()
263 setTruncStoreAction(MVT::v16f32, MVT::v16f16, Expand); in AMDGPUTargetLowering()
281 setTruncStoreAction(MVT::v16f64, MVT::v16f16, Expand); in AMDGPUTargetLowering()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp157 setLoadExtAction(ISD::EXTLOAD, MVT::v16f32, MVT::v16f16, Expand); in AMDGPUTargetLowering()
221 setTruncStoreAction(MVT::v16f32, MVT::v16f16, Expand); in AMDGPUTargetLowering()

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