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Searched refs:v_med3_f32 (Results 1 – 19 of 19) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dknown-never-snan.ll12 ; GCN-NEXT: v_med3_f32 v0, |v0|, 2.0, 4.0
26 ; GCN-NEXT: v_med3_f32 v0, -v0, 2.0, 4.0
41 ; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
56 ; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
72 ; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
87 ; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
102 ; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
119 ; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
135 ; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
151 ; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
[all …]
Dllvm.amdgcn.fmed3.ll5 ; GCN: v_med3_f32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
13 ; GCN: v_med3_f32 v{{[0-9]+}}, -s{{[0-9]+}}, |v{{[0-9]+}}|, -|v{{[0-9]+}}|
25 ; GCN: v_med3_f32 v{{[0-9]+}}, -s{{[0-9]+}}, -v{{[0-9]+}}, -v{{[0-9]+}}
34 ; GCN: v_med3_f32 [[MED3:v[0-9]+]], -s{{[0-9]+}}, -v{{[0-9]+}}, -v{{[0-9]+}}
46 ; GCN: v_med3_f32 [[MED3:v[0-9]+]], s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
57 ; GCN: v_med3_f32 v{{[0-9]+}}, -s{{[0-9]+}}, -v{{[0-9]+}}, [[NEG0]]
68 ; GCN: v_med3_f32 [[MED3:v[0-9]+]], -s{{[0-9]+}}, -v{{[0-9]+}}, [[NEG0]]
81 ; GCN: v_med3_f32 v{{[0-9]+}}, -s{{[0-9]+}}, [[NEG_INV]], [[NEG0]]
92 ; GCN: v_med3_f32 [[MED3:v[0-9]+]], -s{{[0-9]+}}, [[NEG_INV]], [[NEG0]]
Dfmed3.ll8 ; GCN: v_med3_f32 v{{[0-9]+}}, [[ADD]], 2.0, 4.0
23 ; GCN: v_med3_f32 v{{[0-9]+}}, v{{[0-9]+}}, 2.0, 4.0
39 ; GCN: v_med3_f32 v{{[0-9]+}}, v{{[0-9]+}}, 2.0, 4.0
55 ; GCN: v_med3_f32 v{{[0-9]+}}, v{{[0-9]+}}, 2.0, 4.0
123 ; GCN: v_med3_f32 v{{[0-9]+}}, v{{[0-9]+}}, 2.0, 4.0
138 ; GCN: v_med3_f32 v{{[0-9]+}}, v{{[0-9]+}}, 2.0, 4.0
162 ; GCN: v_med3_f32 v{{[0-9]+}}, -[[A]], [[B]], [[C]]
185 ; GCN: v_med3_f32 v{{[0-9]+}}, [[A]], -[[B]], [[C]]
208 ; GCN: v_med3_f32 v{{[0-9]+}}, [[A]], [[B]], -[[C]]
231 ; GCN: v_med3_f32 v{{[0-9]+}}, -[[A]], |[[B]]|, -|[[C]]|
[all …]
Dclamp.ll233 ; GCN: v_med3_f32
389 ; GCN: v_med3_f32 v{{[0-9]+}}, [[ADD]], 0, 1.0
423 ; GCN: v_med3_f32 {{v[0-9]+}}, [[QUIET_A]], 0, 1.0
439 ; GCN: v_med3_f32 v{{[0-9]+}}, [[ADD]], 0, 1.0
481 ; GCN: v_med3_f32 v{{[0-9]+}}, [[A]], 0, 1.0
494 ; GCN: v_med3_f32 v{{[0-9]+}}, [[A]], 1.0, 0
507 ; GCN: v_med3_f32 v{{[0-9]+}}, 0, [[A]], 1.0
520 ; GCN: v_med3_f32 v{{[0-9]+}}, 1.0, [[A]], 0
/external/llvm/test/CodeGen/AMDGPU/
Dfmed3.ll11 ; NOSNAN: v_med3_f32 v{{[0-9]+}}, v{{[0-9]+}}, 2.0, 4.0
29 ; NOSNAN: v_med3_f32 v{{[0-9]+}}, v{{[0-9]+}}, 2.0, 4.0
47 ; NOSNAN: v_med3_f32 v{{[0-9]+}}, v{{[0-9]+}}, 2.0, 4.0
115 ; GCN: v_med3_f32 v{{[0-9]+}}, v{{[0-9]+}}, 2.0, 4.0
130 ; NOSNAN: v_med3_f32 v{{[0-9]+}}, v{{[0-9]+}}, 2.0, 4.0
/external/llvm-project/llvm/test/MC/AMDGPU/
Dgfx10-constant-bus.s13 v_med3_f32 v0, s0, s0, s1 label
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dfmed3.ll24 ; SI-NEXT: v_med3_f32 v2, v2, v3, v4
56 ; VI-NEXT: v_med3_f32 v0, v0, v1, v2
71 ; GFX9-NEXT: v_med3_f32 v1, v1, v2, v3
226 ; SI-NEXT: v_med3_f32 v2, v2, |v3|, v4
260 ; VI-NEXT: v_med3_f32 v2, v4, |v2|, v3
277 ; GFX9-NEXT: v_med3_f32 v1, v1, |v2|, v3
325 ; SI-NEXT: v_med3_f32 v2, v2, v3, v4
361 ; VI-NEXT: v_med3_f32 v2, v4, v2, v3
380 ; GFX9-NEXT: v_med3_f32 v1, v1, v2, v3
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DVOP3Instructions.td350 def V_MED3_F32 : VOP3Inst <"v_med3_f32", VOP3_Profile<VOP_F32_F32_F32_F32>, AMDGPUfmed3>;
/external/llvm-project/llvm/lib/Target/AMDGPU/
DVOP3Instructions.td366 def V_MED3_F32 : VOP3Inst <"v_med3_f32", VOP3_Profile<VOP_F32_F32_F32_F32>, AMDGPUfmed3>;
/external/mesa3d/src/amd/compiler/
Daco_optimizer.cpp1334 case aco_opcode::v_med3_f32: { /* clamp */ in label_instruction()
Daco_instruction_selection.cpp1942 bld.vop3(aco_opcode::v_med3_f32, Definition(dst), Operand(0u), Operand(0x3f800000u), src); in visit_alu_instr()
/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
Dgfx8_dasm_all.txt47325 # CHECK: v_med3_f32 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x0e,0x…
47328 # CHECK: v_med3_f32 v255, v1, v2, v3 ; encoding: [0xff,0x00,0xd6,0xd1,0x01,0x05,0x0e,0x…
47331 # CHECK: v_med3_f32 v5, v255, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0xff,0x05,0x0e,0x…
47334 # CHECK: v_med3_f32 v5, s1, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x01,0x04,0x0e,0x…
47337 # CHECK: v_med3_f32 v5, s101, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x65,0x04,0x0e,0x…
47340 # CHECK: v_med3_f32 v5, flat_scratch_lo, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x66,0x04,0x0e,0x…
47343 # CHECK: v_med3_f32 v5, flat_scratch_hi, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x67,0x04,0x0e,0x…
47346 # CHECK: v_med3_f32 v5, vcc_lo, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x6a,0x04,0x0e,0x…
47349 # CHECK: v_med3_f32 v5, vcc_hi, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x6b,0x04,0x0e,0x…
47352 # CHECK: v_med3_f32 v5, tba_lo, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x6c,0x04,0x0e,0x…
[all …]
Dgfx10_dasm_all.txt82650 # GFX10: v_med3_f32 v255, v1, v2, v3 ; encoding: [0xff,0x00,0x57,0xd5,0x01,0x05,0x0e,0x…
82653 # GFX10: v_med3_f32 v5, -1, v2, v3 ; encoding: [0x05,0x00,0x57,0xd5,0xc1,0x04,0x0e,0x…
82656 # GFX10: v_med3_f32 v5, -4.0, v2, v3 ; encoding: [0x05,0x00,0x57,0xd5,0xf7,0x04,0x0e,0x…
82659 # GFX10: v_med3_f32 v5, -v1, -v2, -v3 ; encoding: [0x05,0x00,0x57,0xd5,0x01,0x05,0x0e,0x…
82662 # GFX10: v_med3_f32 v5, -v1, v2, v3 ; encoding: [0x05,0x00,0x57,0xd5,0x01,0x05,0x0e,0x…
82665 # GFX10: v_med3_f32 v5, 0, v2, v3 ; encoding: [0x05,0x00,0x57,0xd5,0x80,0x04,0x0e,0x…
82668 # GFX10: v_med3_f32 v5, 0.5, v2, v3 ; encoding: [0x05,0x00,0x57,0xd5,0xf0,0x04,0x0e,0x…
82671 # GFX10: v_med3_f32 v5, exec_hi, v2, v3 ; encoding: [0x05,0x00,0x57,0xd5,0x7f,0x04,0x0e,0x…
82674 # GFX10: v_med3_f32 v5, exec_lo, v2, v3 ; encoding: [0x05,0x00,0x57,0xd5,0x7e,0x04,0x0e,0x…
82677 # GFX10: v_med3_f32 v5, m0, v2, v3 ; encoding: [0x05,0x00,0x57,0xd5,0x7c,0x04,0x0e,0x…
[all …]
Dgfx9_dasm_all.txt39510 # CHECK: v_med3_f32 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x0e,0x…
39513 # CHECK: v_med3_f32 v255, v1, v2, v3 ; encoding: [0xff,0x00,0xd6,0xd1,0x01,0x05,0x0e,0x…
39516 # CHECK: v_med3_f32 v5, v255, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0xff,0x05,0x0e,0x…
39519 # CHECK: v_med3_f32 v5, s1, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x01,0x04,0x0e,0x…
39522 # CHECK: v_med3_f32 v5, s101, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x65,0x04,0x0e,0x…
39525 # CHECK: v_med3_f32 v5, flat_scratch_lo, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x66,0x04,0x0e,0x…
39528 # CHECK: v_med3_f32 v5, flat_scratch_hi, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x67,0x04,0x0e,0x…
39531 # CHECK: v_med3_f32 v5, vcc_lo, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x6a,0x04,0x0e,0x…
39534 # CHECK: v_med3_f32 v5, vcc_hi, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x6b,0x04,0x0e,0x…
39537 # CHECK: v_med3_f32 v5, m0, v2, v3 ; encoding: [0x05,0x00,0xd6,0xd1,0x7c,0x04,0x0e,0x…
[all …]
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td1752 defm V_MED3_F32 : VOP3Inst <vop3<0x157, 0x1d6>, "v_med3_f32",
/external/llvm-project/llvm/docs/AMDGPU/
DAMDGPUAsmGFX7.rst1083 …v_med3_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdg…
DAMDGPUAsmGFX8.rst1359 …v_med3_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid…
DAMDGPUAsmGFX9.rst1574 …v_med3_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgp…
DAMDGPUAsmGFX10.rst1823 …v_med3_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_syni…