1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _ASM_X86_KVM_H 20 #define _ASM_X86_KVM_H 21 #include <linux/types.h> 22 #include <linux/ioctl.h> 23 #define KVM_PIO_PAGE_OFFSET 1 24 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 25 #define KVM_DIRTY_LOG_PAGE_OFFSET 64 26 #define DE_VECTOR 0 27 #define DB_VECTOR 1 28 #define BP_VECTOR 3 29 #define OF_VECTOR 4 30 #define BR_VECTOR 5 31 #define UD_VECTOR 6 32 #define NM_VECTOR 7 33 #define DF_VECTOR 8 34 #define TS_VECTOR 10 35 #define NP_VECTOR 11 36 #define SS_VECTOR 12 37 #define GP_VECTOR 13 38 #define PF_VECTOR 14 39 #define MF_VECTOR 16 40 #define AC_VECTOR 17 41 #define MC_VECTOR 18 42 #define XM_VECTOR 19 43 #define VE_VECTOR 20 44 #define __KVM_HAVE_PIT 45 #define __KVM_HAVE_IOAPIC 46 #define __KVM_HAVE_IRQ_LINE 47 #define __KVM_HAVE_MSI 48 #define __KVM_HAVE_USER_NMI 49 #define __KVM_HAVE_GUEST_DEBUG 50 #define __KVM_HAVE_MSIX 51 #define __KVM_HAVE_MCE 52 #define __KVM_HAVE_PIT_STATE2 53 #define __KVM_HAVE_XEN_HVM 54 #define __KVM_HAVE_VCPU_EVENTS 55 #define __KVM_HAVE_DEBUGREGS 56 #define __KVM_HAVE_XSAVE 57 #define __KVM_HAVE_XCRS 58 #define __KVM_HAVE_READONLY_MEM 59 #define KVM_NR_INTERRUPTS 256 60 struct kvm_memory_alias { 61 __u32 slot; 62 __u32 flags; 63 __u64 guest_phys_addr; 64 __u64 memory_size; 65 __u64 target_phys_addr; 66 }; 67 struct kvm_pic_state { 68 __u8 last_irr; 69 __u8 irr; 70 __u8 imr; 71 __u8 isr; 72 __u8 priority_add; 73 __u8 irq_base; 74 __u8 read_reg_select; 75 __u8 poll; 76 __u8 special_mask; 77 __u8 init_state; 78 __u8 auto_eoi; 79 __u8 rotate_on_auto_eoi; 80 __u8 special_fully_nested_mode; 81 __u8 init4; 82 __u8 elcr; 83 __u8 elcr_mask; 84 }; 85 #define KVM_IOAPIC_NUM_PINS 24 86 struct kvm_ioapic_state { 87 __u64 base_address; 88 __u32 ioregsel; 89 __u32 id; 90 __u32 irr; 91 __u32 pad; 92 union { 93 __u64 bits; 94 struct { 95 __u8 vector; 96 __u8 delivery_mode : 3; 97 __u8 dest_mode : 1; 98 __u8 delivery_status : 1; 99 __u8 polarity : 1; 100 __u8 remote_irr : 1; 101 __u8 trig_mode : 1; 102 __u8 mask : 1; 103 __u8 reserve : 7; 104 __u8 reserved[4]; 105 __u8 dest_id; 106 } fields; 107 } redirtbl[KVM_IOAPIC_NUM_PINS]; 108 }; 109 #define KVM_IRQCHIP_PIC_MASTER 0 110 #define KVM_IRQCHIP_PIC_SLAVE 1 111 #define KVM_IRQCHIP_IOAPIC 2 112 #define KVM_NR_IRQCHIPS 3 113 #define KVM_RUN_X86_SMM (1 << 0) 114 #define KVM_RUN_X86_BUS_LOCK (1 << 1) 115 struct kvm_regs { 116 __u64 rax, rbx, rcx, rdx; 117 __u64 rsi, rdi, rsp, rbp; 118 __u64 r8, r9, r10, r11; 119 __u64 r12, r13, r14, r15; 120 __u64 rip, rflags; 121 }; 122 #define KVM_APIC_REG_SIZE 0x400 123 struct kvm_lapic_state { 124 char regs[KVM_APIC_REG_SIZE]; 125 }; 126 struct kvm_segment { 127 __u64 base; 128 __u32 limit; 129 __u16 selector; 130 __u8 type; 131 __u8 present, dpl, db, s, l, g, avl; 132 __u8 unusable; 133 __u8 padding; 134 }; 135 struct kvm_dtable { 136 __u64 base; 137 __u16 limit; 138 __u16 padding[3]; 139 }; 140 struct kvm_sregs { 141 struct kvm_segment cs, ds, es, fs, gs, ss; 142 struct kvm_segment tr, ldt; 143 struct kvm_dtable gdt, idt; 144 __u64 cr0, cr2, cr3, cr4, cr8; 145 __u64 efer; 146 __u64 apic_base; 147 __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64]; 148 }; 149 struct kvm_fpu { 150 __u8 fpr[8][16]; 151 __u16 fcw; 152 __u16 fsw; 153 __u8 ftwx; 154 __u8 pad1; 155 __u16 last_opcode; 156 __u64 last_ip; 157 __u64 last_dp; 158 __u8 xmm[16][16]; 159 __u32 mxcsr; 160 __u32 pad2; 161 }; 162 struct kvm_msr_entry { 163 __u32 index; 164 __u32 reserved; 165 __u64 data; 166 }; 167 struct kvm_msrs { 168 __u32 nmsrs; 169 __u32 pad; 170 struct kvm_msr_entry entries[0]; 171 }; 172 struct kvm_msr_list { 173 __u32 nmsrs; 174 __u32 indices[0]; 175 }; 176 #define KVM_MSR_FILTER_MAX_BITMAP_SIZE 0x600 177 struct kvm_msr_filter_range { 178 #define KVM_MSR_FILTER_READ (1 << 0) 179 #define KVM_MSR_FILTER_WRITE (1 << 1) 180 __u32 flags; 181 __u32 nmsrs; 182 __u32 base; 183 __u8 * bitmap; 184 }; 185 #define KVM_MSR_FILTER_MAX_RANGES 16 186 struct kvm_msr_filter { 187 #define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0) 188 #define KVM_MSR_FILTER_DEFAULT_DENY (1 << 0) 189 __u32 flags; 190 struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES]; 191 }; 192 struct kvm_cpuid_entry { 193 __u32 function; 194 __u32 eax; 195 __u32 ebx; 196 __u32 ecx; 197 __u32 edx; 198 __u32 padding; 199 }; 200 struct kvm_cpuid { 201 __u32 nent; 202 __u32 padding; 203 struct kvm_cpuid_entry entries[0]; 204 }; 205 struct kvm_cpuid_entry2 { 206 __u32 function; 207 __u32 index; 208 __u32 flags; 209 __u32 eax; 210 __u32 ebx; 211 __u32 ecx; 212 __u32 edx; 213 __u32 padding[3]; 214 }; 215 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX (1 << 0) 216 #define KVM_CPUID_FLAG_STATEFUL_FUNC (1 << 1) 217 #define KVM_CPUID_FLAG_STATE_READ_NEXT (1 << 2) 218 struct kvm_cpuid2 { 219 __u32 nent; 220 __u32 padding; 221 struct kvm_cpuid_entry2 entries[0]; 222 }; 223 struct kvm_pit_channel_state { 224 __u32 count; 225 __u16 latched_count; 226 __u8 count_latched; 227 __u8 status_latched; 228 __u8 status; 229 __u8 read_state; 230 __u8 write_state; 231 __u8 write_latch; 232 __u8 rw_mode; 233 __u8 mode; 234 __u8 bcd; 235 __u8 gate; 236 __s64 count_load_time; 237 }; 238 struct kvm_debug_exit_arch { 239 __u32 exception; 240 __u32 pad; 241 __u64 pc; 242 __u64 dr6; 243 __u64 dr7; 244 }; 245 #define KVM_GUESTDBG_USE_SW_BP 0x00010000 246 #define KVM_GUESTDBG_USE_HW_BP 0x00020000 247 #define KVM_GUESTDBG_INJECT_DB 0x00040000 248 #define KVM_GUESTDBG_INJECT_BP 0x00080000 249 struct kvm_guest_debug_arch { 250 __u64 debugreg[8]; 251 }; 252 struct kvm_pit_state { 253 struct kvm_pit_channel_state channels[3]; 254 }; 255 #define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001 256 struct kvm_pit_state2 { 257 struct kvm_pit_channel_state channels[3]; 258 __u32 flags; 259 __u32 reserved[9]; 260 }; 261 struct kvm_reinject_control { 262 __u8 pit_reinject; 263 __u8 reserved[31]; 264 }; 265 #define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001 266 #define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002 267 #define KVM_VCPUEVENT_VALID_SHADOW 0x00000004 268 #define KVM_VCPUEVENT_VALID_SMM 0x00000008 269 #define KVM_VCPUEVENT_VALID_PAYLOAD 0x00000010 270 #define KVM_X86_SHADOW_INT_MOV_SS 0x01 271 #define KVM_X86_SHADOW_INT_STI 0x02 272 struct kvm_vcpu_events { 273 struct { 274 __u8 injected; 275 __u8 nr; 276 __u8 has_error_code; 277 __u8 pending; 278 __u32 error_code; 279 } exception; 280 struct { 281 __u8 injected; 282 __u8 nr; 283 __u8 soft; 284 __u8 shadow; 285 } interrupt; 286 struct { 287 __u8 injected; 288 __u8 pending; 289 __u8 masked; 290 __u8 pad; 291 } nmi; 292 __u32 sipi_vector; 293 __u32 flags; 294 struct { 295 __u8 smm; 296 __u8 pending; 297 __u8 smm_inside_nmi; 298 __u8 latched_init; 299 } smi; 300 __u8 reserved[27]; 301 __u8 exception_has_payload; 302 __u64 exception_payload; 303 }; 304 struct kvm_debugregs { 305 __u64 db[4]; 306 __u64 dr6; 307 __u64 dr7; 308 __u64 flags; 309 __u64 reserved[9]; 310 }; 311 struct kvm_xsave { 312 __u32 region[1024]; 313 }; 314 #define KVM_MAX_XCRS 16 315 struct kvm_xcr { 316 __u32 xcr; 317 __u32 reserved; 318 __u64 value; 319 }; 320 struct kvm_xcrs { 321 __u32 nr_xcrs; 322 __u32 flags; 323 struct kvm_xcr xcrs[KVM_MAX_XCRS]; 324 __u64 padding[16]; 325 }; 326 #define KVM_SYNC_X86_REGS (1UL << 0) 327 #define KVM_SYNC_X86_SREGS (1UL << 1) 328 #define KVM_SYNC_X86_EVENTS (1UL << 2) 329 #define KVM_SYNC_X86_VALID_FIELDS (KVM_SYNC_X86_REGS | KVM_SYNC_X86_SREGS | KVM_SYNC_X86_EVENTS) 330 struct kvm_sync_regs { 331 struct kvm_regs regs; 332 struct kvm_sregs sregs; 333 struct kvm_vcpu_events events; 334 }; 335 #define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0) 336 #define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1) 337 #define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2) 338 #define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3) 339 #define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4) 340 #define KVM_STATE_NESTED_FORMAT_VMX 0 341 #define KVM_STATE_NESTED_FORMAT_SVM 1 342 #define KVM_STATE_NESTED_GUEST_MODE 0x00000001 343 #define KVM_STATE_NESTED_RUN_PENDING 0x00000002 344 #define KVM_STATE_NESTED_EVMCS 0x00000004 345 #define KVM_STATE_NESTED_MTF_PENDING 0x00000008 346 #define KVM_STATE_NESTED_GIF_SET 0x00000100 347 #define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001 348 #define KVM_STATE_NESTED_SMM_VMXON 0x00000002 349 #define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000 350 #define KVM_STATE_NESTED_SVM_VMCB_SIZE 0x1000 351 #define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001 352 struct kvm_vmx_nested_state_data { 353 __u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE]; 354 __u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE]; 355 }; 356 struct kvm_vmx_nested_state_hdr { 357 __u64 vmxon_pa; 358 __u64 vmcs12_pa; 359 struct { 360 __u16 flags; 361 } smm; 362 __u32 flags; 363 __u64 preemption_timer_deadline; 364 }; 365 struct kvm_svm_nested_state_data { 366 __u8 vmcb12[KVM_STATE_NESTED_SVM_VMCB_SIZE]; 367 }; 368 struct kvm_svm_nested_state_hdr { 369 __u64 vmcb_pa; 370 }; 371 struct kvm_nested_state { 372 __u16 flags; 373 __u16 format; 374 __u32 size; 375 union { 376 struct kvm_vmx_nested_state_hdr vmx; 377 struct kvm_svm_nested_state_hdr svm; 378 __u8 pad[120]; 379 } hdr; 380 union { 381 struct kvm_vmx_nested_state_data vmx[0]; 382 struct kvm_svm_nested_state_data svm[0]; 383 } data; 384 }; 385 struct kvm_pmu_event_filter { 386 __u32 action; 387 __u32 nevents; 388 __u32 fixed_counter_bitmap; 389 __u32 flags; 390 __u32 pad[4]; 391 __u64 events[0]; 392 }; 393 #define KVM_PMU_EVENT_ALLOW 0 394 #define KVM_PMU_EVENT_DENY 1 395 #endif 396