1 // Copyright 2020 The Chromium OS Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file. 4 5 use std::marker::{Send, Sized}; 6 7 use crate::Bus; 8 use base::{Event, Result}; 9 use hypervisor::{IrqRoute, MPState, Vcpu}; 10 use resources::SystemAllocator; 11 12 mod kvm; 13 pub use self::kvm::KvmKernelIrqChip; 14 15 #[cfg(any(target_arch = "arm", target_arch = "aarch64"))] 16 pub use self::kvm::AARCH64_GIC_NR_IRQS; 17 18 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] 19 pub use self::kvm::KvmSplitIrqChip; 20 21 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] 22 mod x86_64; 23 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] 24 pub use x86_64::*; 25 26 #[cfg(any(target_arch = "arm", target_arch = "aarch64"))] 27 mod aarch64; 28 #[cfg(any(target_arch = "arm", target_arch = "aarch64"))] 29 pub use aarch64::*; 30 31 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] 32 mod pic; 33 34 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] 35 pub use pic::*; 36 37 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] 38 mod ioapic; 39 40 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] 41 pub use ioapic::*; 42 43 pub type IrqEventIndex = usize; 44 45 struct IrqEvent { 46 event: Event, 47 gsi: u32, 48 resample_event: Option<Event>, 49 } 50 51 /// Trait that abstracts interactions with interrupt controllers. 52 /// 53 /// Each VM will have one IrqChip instance which is responsible for routing IRQ lines and 54 /// registering IRQ events. Depending on the implementation, the IrqChip may interact with an 55 /// underlying hypervisor API or emulate devices in userspace. 56 /// 57 /// This trait is generic over a Vcpu type because some IrqChip implementations can support 58 /// multiple hypervisors with a single implementation. 59 pub trait IrqChip: Send { 60 /// Add a vcpu to the irq chip. add_vcpu(&mut self, vcpu_id: usize, vcpu: &dyn Vcpu) -> Result<()>61 fn add_vcpu(&mut self, vcpu_id: usize, vcpu: &dyn Vcpu) -> Result<()>; 62 63 /// Register an event that can trigger an interrupt for a particular GSI. register_irq_event( &mut self, irq: u32, irq_event: &Event, resample_event: Option<&Event>, ) -> Result<Option<IrqEventIndex>>64 fn register_irq_event( 65 &mut self, 66 irq: u32, 67 irq_event: &Event, 68 resample_event: Option<&Event>, 69 ) -> Result<Option<IrqEventIndex>>; 70 71 /// Unregister an event for a particular GSI. unregister_irq_event(&mut self, irq: u32, irq_event: &Event) -> Result<()>72 fn unregister_irq_event(&mut self, irq: u32, irq_event: &Event) -> Result<()>; 73 74 /// Route an IRQ line to an interrupt controller, or to a particular MSI vector. route_irq(&mut self, route: IrqRoute) -> Result<()>75 fn route_irq(&mut self, route: IrqRoute) -> Result<()>; 76 77 /// Replace all irq routes with the supplied routes set_irq_routes(&mut self, routes: &[IrqRoute]) -> Result<()>78 fn set_irq_routes(&mut self, routes: &[IrqRoute]) -> Result<()>; 79 80 /// Return a vector of all registered irq numbers and their associated events and event 81 /// indices. These should be used by the main thread to wait for irq events. irq_event_tokens(&self) -> Result<Vec<(IrqEventIndex, u32, Event)>>82 fn irq_event_tokens(&self) -> Result<Vec<(IrqEventIndex, u32, Event)>>; 83 84 /// Either assert or deassert an IRQ line. Sends to either an interrupt controller, or does 85 /// a send_msi if the irq is associated with an MSI. service_irq(&mut self, irq: u32, level: bool) -> Result<()>86 fn service_irq(&mut self, irq: u32, level: bool) -> Result<()>; 87 88 /// Service an IRQ event by asserting then deasserting an IRQ line. The associated Event 89 /// that triggered the irq event will be read from. If the irq is associated with a resample 90 /// Event, then the deassert will only happen after an EOI is broadcast for a vector 91 /// associated with the irq line. service_irq_event(&mut self, event_index: IrqEventIndex) -> Result<()>92 fn service_irq_event(&mut self, event_index: IrqEventIndex) -> Result<()>; 93 94 /// Broadcast an end of interrupt. broadcast_eoi(&self, vector: u8) -> Result<()>95 fn broadcast_eoi(&self, vector: u8) -> Result<()>; 96 97 /// Injects any pending interrupts for `vcpu`. inject_interrupts(&self, vcpu: &dyn Vcpu) -> Result<()>98 fn inject_interrupts(&self, vcpu: &dyn Vcpu) -> Result<()>; 99 100 /// Notifies the irq chip that the specified VCPU has executed a halt instruction. halted(&self, vcpu_id: usize)101 fn halted(&self, vcpu_id: usize); 102 103 /// Blocks until `vcpu` is in a runnable state or until interrupted by 104 /// `IrqChip::kick_halted_vcpus`. Returns `VcpuRunState::Runnable if vcpu is runnable, or 105 /// `VcpuRunState::Interrupted` if the wait was interrupted. wait_until_runnable(&self, vcpu: &dyn Vcpu) -> Result<VcpuRunState>106 fn wait_until_runnable(&self, vcpu: &dyn Vcpu) -> Result<VcpuRunState>; 107 108 /// Makes unrunnable VCPUs return immediately from `wait_until_runnable`. 109 /// For UserspaceIrqChip, every vcpu gets kicked so its current or next call to 110 /// `wait_until_runnable` will immediately return false. After that one kick, subsequent 111 /// `wait_until_runnable` calls go back to waiting for runnability normally. kick_halted_vcpus(&self)112 fn kick_halted_vcpus(&self); 113 114 /// Get the current MP state of the specified VCPU. get_mp_state(&self, vcpu_id: usize) -> Result<MPState>115 fn get_mp_state(&self, vcpu_id: usize) -> Result<MPState>; 116 117 /// Set the current MP state of the specified VCPU. set_mp_state(&mut self, vcpu_id: usize, state: &MPState) -> Result<()>118 fn set_mp_state(&mut self, vcpu_id: usize, state: &MPState) -> Result<()>; 119 120 /// Attempt to create a shallow clone of this IrqChip instance. try_clone(&self) -> Result<Self> where Self: Sized121 fn try_clone(&self) -> Result<Self> 122 where 123 Self: Sized; 124 125 /// Finalize irqchip setup. Should be called once all devices have registered irq events and 126 /// been added to the io_bus and mmio_bus. finalize_devices( &mut self, resources: &mut SystemAllocator, io_bus: &mut Bus, mmio_bus: &mut Bus, ) -> Result<()>127 fn finalize_devices( 128 &mut self, 129 resources: &mut SystemAllocator, 130 io_bus: &mut Bus, 131 mmio_bus: &mut Bus, 132 ) -> Result<()>; 133 134 /// Process any irqs events that were delayed because of any locking issues. process_delayed_irq_events(&mut self) -> Result<()>135 fn process_delayed_irq_events(&mut self) -> Result<()>; 136 137 /// Checks if a particular `IrqChipCap` is available. check_capability(&self, c: IrqChipCap) -> bool138 fn check_capability(&self, c: IrqChipCap) -> bool; 139 } 140 141 /// A capability the `IrqChip` can possibly expose. 142 #[derive(Clone, Copy, Debug, PartialEq)] 143 pub enum IrqChipCap { 144 /// APIC TSC-deadline timer mode. 145 TscDeadlineTimer, 146 /// Extended xAPIC (x2APIC) standard. 147 X2Apic, 148 } 149 150 /// A capability the `IrqChip` can possibly expose. 151 #[derive(Clone, Copy, Debug, PartialEq)] 152 pub enum VcpuRunState { 153 Runnable, 154 Interrupted, 155 } 156