1; RUN: llc < %s | FileCheck %s --check-prefix NOATOMIC
2; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics | FileCheck %s
3
4target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
5target triple = "wasm32-unknown-unknown"
6
7; A multithread fence is lowered to an atomic.fence instruction.
8; CHECK-LABEL: multithread_fence:
9; CHECK:  atomic.fence
10; NOATOMIC-NOT: i32.atomic.rmw.or
11define void @multithread_fence() {
12  fence seq_cst
13  ret void
14}
15
16; Fences with weaker memory orderings than seq_cst should be treated the same
17; because atomic memory access in wasm are sequentially consistent.
18; CHECK-LABEL: multithread_weak_fence:
19; CHECK:       atomic.fence
20; CHECK-NEXT:  atomic.fence
21; CHECK-NEXT:  atomic.fence
22define void @multithread_weak_fence() {
23  fence acquire
24  fence release
25  fence acq_rel
26  ret void
27}
28
29; A singlethread fence becomes compiler_fence instruction, a pseudo instruction
30; that acts as a compiler barrier. The barrier should not be emitted to .s file.
31; CHECK-LABEL: singlethread_fence:
32; CHECK-NOT: compiler_fence
33; CHECK-NOT: atomic_fence
34define void @singlethread_fence() {
35  fence syncscope("singlethread") seq_cst
36  fence syncscope("singlethread") acquire
37  fence syncscope("singlethread") release
38  fence syncscope("singlethread") acq_rel
39  ret void
40}
41