Lines Matching refs:r1
22 GET_VREG r1, r3 @ r1<- vCC
25 cmp r1, #0 @ is second operand zero?
55 GET_VREG r1, r3 @ r1<- vB
58 cmp r1, #0 @ is second operand zero?
84 FETCH_S r1, 1 @ r1<- ssssCCCC (sign-extended)
89 cmp r1, #0 @ is second operand zero?
123 $extract @ optional; typically r1<- ssssssCC (sign extended)
125 @cmp r1, #0 @ is second operand zero?
160 GET_VREG_WIDE_BY_ADDR r0, r1, r2 @ r0/r1<- vBB/vBB+1
191 mov r1, rINST, lsr #12 @ r1<- B
193 VREG_INDEX_TO_ADDR r1, r1 @ r1<- &fp[B]
195 GET_VREG_WIDE_BY_ADDR r2, r3, r1 @ r2/r3<- vBB/vBB+1
196 GET_VREG_WIDE_BY_ADDR r0, r1, r4 @ r0/r1<- vAA/vAA+1
246 GET_VREG_WIDE_BY_ADDR r0, r1, r3 @ r0/r1<- vB/vB+1
268 GET_VREG_WIDE_BY_ADDR r0, r1, r3 @ r0/r1<- vAA
272 $instr @ r0/r1<- op, r2-r3 changed
274 SET_VREG_WIDE_BY_ADDR r0, r1, r4 @ vAA<- r0/r1
296 SET_VREG_WIDE_BY_ADDR r0, r1, r4 @ vA/vA+1<- r0/r1
348 GET_VREG_WIDE_BY_ADDR r0, r1, r2 @ r0/r1<- vBB/vBB+1
351 sbcs ip, r1, r3 @ Sets correct CCs for checking LT (but not EQ/NE)
379 GET_VREG r1, r3 @ r1<- vCC
381 cmp r1, #0 @ is second operand zero?
386 sdiv r0, r0, r1 @ r0<- op
408 GET_VREG r1, r3 @ r1<- vB
410 cmp r1, #0 @ is second operand zero?
415 sdiv r0, r0, r1 @ r0<- op
436 FETCH_S r1, 1 @ r1<- ssssCCCC (sign-extended)
440 cmp r1, #0 @ is second operand zero?
445 sdiv r0, r0, r1 @ r0<- op
469 movs r1, r3, asr #8 @ r1<- ssssssCC (sign extended)
470 @cmp r1, #0 @ is second operand zero?
475 sdiv r0, r0, r1 @ r0<- op
549 GET_VREG_WIDE_BY_ADDR r0, r1, r2 @ r0/r1<- vBB/vBB+1
553 mla r3, r1, r2, ip @ r3<- YxX + (ZxW)
555 add r1, r3, lr @ r1<- lr + low(ZxW + (YxX))
560 SET_VREG_WIDE_BY_ADDR r0, r1 , r4 @ vAA/vAA+1<- r1/r2
573 mov r1, rINST, lsr #12 @ r1<- B
575 VREG_INDEX_TO_ADDR r1, r1 @ r1<- &fp[B]
577 GET_VREG_WIDE_BY_ADDR r2, r3, r1 @ r2/r3<- vBB/vBB+1
578 GET_VREG_WIDE_BY_ADDR r0, r1, rINST @ r0/r1<- vAA/vAA+1
581 mla r3, r1, r2, ip @ r3<- YxX + (ZxW)
584 add r1, r3, lr @ r1<- lr + low(ZxW + (YxX))
586 SET_VREG_WIDE_BY_ADDR r0, r1, r4 @ vAA/vAA+1<- r0/r1
636 GET_VREG r1, r3 @ r1<- vCC
638 cmp r1, #0 @ is second operand zero?
643 sdiv r2, r0, r1
644 mls r1, r1, r2, r0 @ r1<- op, r0-r2 changed
646 bl __aeabi_idivmod @ r1<- op, r0-r3 changed
649 SET_VREG r1, r4 @ vAA<- r1
668 GET_VREG r1, r3 @ r1<- vB
670 cmp r1, #0 @ is second operand zero?
675 sdiv r2, r0, r1
676 mls r1, r1, r2, r0 @ r1<- op
678 bl __aeabi_idivmod @ r1<- op, r0-r3 changed
681 SET_VREG r1, r4 @ vAA<- r1
699 FETCH_S r1, 1 @ r1<- ssssCCCC (sign-extended)
703 cmp r1, #0 @ is second operand zero?
708 sdiv r2, r0, r1
709 mls r1, r1, r2, r0 @ r1<- op
711 bl __aeabi_idivmod @ r1<- op, r0-r3 changed
714 SET_VREG r1, r4 @ vAA<- r1
735 movs r1, r3, asr #8 @ r1<- ssssssCC (sign extended)
736 @cmp r1, #0 @ is second operand zero?
741 sdiv r2, r0, r1
742 mls r1, r1, r2, r0 @ r1<- op
744 bl __aeabi_idivmod @ r1<- op, r0-r3 changed
747 SET_VREG r1, r4 @ vAA<- r1
789 GET_VREG_WIDE_BY_ADDR r0, r1, r3 @ r0/r1<- vBB/vBB+1
793 mov r1, r1, asl r2 @ r1<- r1 << r2
795 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2))
798 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32)
802 SET_VREG_WIDE_BY_ADDR r0, r1, r4 @ vAA/vAA+1<- r0/r1
817 GET_VREG_WIDE_BY_ADDR r0, r1, r4 @ r0/r1<- vAA/vAA+1
818 mov r1, r1, asl r2 @ r1<- r1 << r2
820 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2))
824 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32)
827 SET_VREG_WIDE_BY_ADDR r0, r1, r4 @ vAA/vAA+1<- r0/r1
853 GET_VREG_WIDE_BY_ADDR r0, r1, r3 @ r0/r1<- vBB/vBB+1
859 orr r0, r0, r1, lsl r3 @ r0<- r0 | (r1 << (32-r2))
862 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32)
864 mov r1, r1, asr r2 @ r1<- r1 >> r2
866 SET_VREG_WIDE_BY_ADDR r0, r1, r4 @ vAA/vAA+1<- r0/r1
881 GET_VREG_WIDE_BY_ADDR r0, r1, r4 @ r0/r1<- vAA/vAA+1
884 orr r0, r0, r1, lsl r3 @ r0<- r0 | (r1 << (32-r2))
888 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32)
889 mov r1, r1, asr r2 @ r1<- r1 >> r2
891 SET_VREG_WIDE_BY_ADDR r0, r1, r4 @ vAA/vAA+1<- r0/r1
929 GET_VREG_WIDE_BY_ADDR r0, r1, r3 @ r0/r1<- vBB/vBB+1
935 orr r0, r0, r1, lsl r3 @ r0<- r0 | (r1 << (32-r2))
938 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
940 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
942 SET_VREG_WIDE_BY_ADDR r0, r1, r4 @ vAA/vAA+1<- r0/r1
957 GET_VREG_WIDE_BY_ADDR r0, r1, r4 @ r0/r1<- vAA/vAA+1
960 orr r0, r0, r1, lsl r3 @ r0<- r0 | (r1 << (32-r2))
964 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
965 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
967 SET_VREG_WIDE_BY_ADDR r0, r1, r4 @ vAA/vAA+1<- r0/r1