1 /* 2 * Copyright (C) 2012 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 /** 18 * Project HWC 2.0 Design 19 */ 20 21 #ifndef _EXYNOSMPP_H 22 #define _EXYNOSMPP_H 23 24 #include <utils/Thread.h> 25 #include <utils/Mutex.h> 26 #include <utils/Condition.h> 27 #include <utils/String8.h> 28 #include <utils/StrongPointer.h> 29 #include <utils/List.h> 30 #include <utils/Vector.h> 31 #include <map> 32 #include <hardware/exynos/acryl.h> 33 #include <map> 34 #include "ExynosHWCModule.h" 35 #include "ExynosHWCHelper.h" 36 #include "ExynosMPPType.h" 37 38 class ExynosDisplay; 39 class ExynosMPP; 40 class ExynosResourceManager; 41 42 #ifndef NUM_MPP_DST_BUFS 43 #define NUM_MPP_DST_BUFS_DEFAULT 3 44 /* 45 * Buffer number can be different according to type 46 * #define NUM_MPP_DST_BUFS(type) ((type == MPP_LOGICAL_G2D_RGB) ? 3:2) 47 */ 48 #define NUM_MPP_DST_BUFS(type) (3) 49 #endif 50 51 #ifndef G2D_MAX_SRC_NUM 52 #define G2D_MAX_SRC_NUM 15 53 #endif 54 55 #define G2D_JUSTIFIED_DST_ALIGN 16 56 57 #define NUM_MPP_SRC_BUFS G2D_MAX_SRC_NUM 58 59 #ifndef G2D_RESTRICTIVE_SRC_NUM 60 #define G2D_RESTRICTIVE_SRC_NUM 5 61 #endif 62 63 #ifndef G2D_BASE_PPC 64 #define G2D_BASE_PPC 2.8 65 #endif 66 #ifndef G2D_DST_BASE_PPC 67 #define G2D_DST_BASE_PPC 3.5 68 #endif 69 #ifndef G2D_DST_BASE_PPC_YUV420 70 #define G2D_DST_BASE_PPC_YUV420 2.8 71 #endif 72 #ifndef G2D_DST_BASE_PPC_ROT 73 #define G2D_DST_BASE_PPC_ROT 2.4 74 #endif 75 #ifndef G2D_BASE_PPC_COLORFILL 76 #define G2D_BASE_PPC_COLORFILL 3.8 77 #endif 78 79 #ifndef G2D_CLOCK 80 #define G2D_CLOCK 711000 81 #endif 82 83 #ifndef MSC_CLOCK 84 #define MSC_CLOCK 534000 85 #endif 86 87 #ifndef VPP_CLOCK 88 #define VPP_CLOCK 664000 89 #endif 90 #ifndef VPP_MIC_FACTOR 91 #define VPP_MIC_FACTOR 2 92 #endif 93 94 #ifndef VPP_TE_PERIOD 95 #define VPP_TE_PERIOD 63 96 #endif 97 #ifndef VPP_MARGIN 98 #define VPP_MARGIN 1.1 99 #endif 100 #ifndef VPP_BUBBLE 101 #define VPP_BUBBLE 0.06 102 #endif 103 104 #define VPP_RESOL_CLOCK_FACTOR (VPP_TE_PERIOD * VPP_MARGIN) 105 #define VPP_RESOL_MARGIN (VPP_MARGIN + VPP_BUBBLE) 106 #ifndef VPP_DISP_FACTOR 107 #define VPP_DISP_FACTOR 1.0 108 #endif 109 #ifndef VPP_PIXEL_PER_CLOCK 110 #define VPP_PIXEL_PER_CLOCK 2 111 #endif 112 113 #ifndef MPP_G2D_CAPACITY 114 #define MPP_G2D_CAPACITY 8 115 #endif 116 #ifndef MPP_MSC_CAPACITY 117 #define MPP_MSC_CAPACITY 8 118 #endif 119 120 /* Currently allowed capacity percentage is over 10% */ 121 #define MPP_CAPA_OVER_THRESHOLD 1.1 122 123 #ifndef MPP_G2D_SRC_SCALED_WEIGHT 124 #define MPP_G2D_SRC_SCALED_WEIGHT 1.125 125 #endif 126 127 #ifndef MPP_G2D_DST_ROT_WEIGHT 128 #define MPP_G2D_DST_ROT_WEIGHT 2.0 129 #endif 130 131 #define MPP_DUMP_PATH "/data/vendor/log/hwc/output.dat" 132 133 using namespace android; 134 135 enum { 136 eMPPSaveCapability = 1ULL << 0, 137 eMPPStrideCrop = 1ULL << 1, 138 eMPPUnsupportedRotation = 1ULL << 2, 139 eMPPHWBusy = 1ULL << 3, 140 eMPPExeedSrcCropMax = 1ULL << 4, 141 eMPPUnsupportedColorTransform = 1ULL << 5, 142 eMPPUnsupportedBlending = 1ULL << 6, 143 eMPPUnsupportedFormat = 1ULL << 7, 144 eMPPNotAlignedDstSize = 1ULL << 8, 145 eMPPNotAlignedSrcCropPosition = 1ULL << 9, 146 eMPPNotAlignedHStride = 1ULL << 10, 147 eMPPNotAlignedVStride = 1ULL << 11, 148 eMPPExceedHStrideMaximum = 1ULL << 12, 149 eMPPExceedVStrideMaximum = 1ULL << 13, 150 eMPPExeedMaxDownScale = 1ULL << 14, 151 eMPPExeedMaxDstWidth = 1ULL << 15, 152 eMPPExeedMaxDstHeight = 1ULL << 16, 153 eMPPExeedMinSrcWidth = 1ULL << 17, 154 eMPPExeedMinSrcHeight = 1ULL << 18, 155 eMPPExeedMaxUpScale = 1ULL << 19, 156 eMPPExeedSrcWCropMax = 1ULL << 20, 157 eMPPExeedSrcHCropMax = 1ULL << 21, 158 eMPPExeedSrcWCropMin = 1ULL << 22, 159 eMPPExeedSrcHCropMin = 1ULL << 23, 160 eMPPNotAlignedCrop = 1ULL << 24, 161 eMPPNotAlignedOffset = 1ULL << 25, 162 eMPPExeedMinDstWidth = 1ULL << 26, 163 eMPPExeedMinDstHeight = 1ULL << 27, 164 eMPPUnsupportedCompression = 1ULL << 28, 165 eMPPUnsupportedCSC = 1ULL << 29, 166 eMPPUnsupportedDIMLayer = 1ULL << 30, 167 eMPPUnsupportedDRM = 1ULL << 31, 168 eMPPUnsupportedDynamicMeta = 1ULL << 32, 169 }; 170 171 enum { 172 MPP_TYPE_NONE, 173 MPP_TYPE_OTF, 174 MPP_TYPE_M2M 175 }; 176 177 enum { 178 MPP_ASSIGN_STATE_FREE = 0x00000000, 179 MPP_ASSIGN_STATE_RESERVED = 0x00000001, 180 MPP_ASSIGN_STATE_ASSIGNED = 0x00000002, 181 }; 182 183 enum { 184 MPP_HW_STATE_IDLE, 185 MPP_HW_STATE_RUNNING 186 }; 187 188 enum { 189 MPP_BUFFER_NORMAL = 0, 190 MPP_BUFFER_NORMAL_DRM, 191 MPP_BUFFER_SECURE_DRM, 192 MPP_BUFFER_DUMP, 193 }; 194 195 enum { 196 MPP_MEM_MMAP = 1, 197 MPP_MEM_USERPTR, 198 MPP_MEM_OVERLAY, 199 MPP_MEM_DMABUF, 200 }; 201 202 enum { 203 MPP_SOURCE_COMPOSITION_TARGET, 204 MPP_SOURCE_LAYER, 205 MPP_SOURCE_MAX 206 }; 207 208 /* Based on multi-resolution feature */ 209 typedef enum { 210 DST_SIZE_HD = 0, 211 DST_SIZE_HD_PLUS, 212 DST_SIZE_FHD, 213 DST_SIZE_FHD_PLUS, 214 DST_SIZE_WQHD, 215 DST_SIZE_WQHD_PLUS, 216 DST_SIZE_UNKNOWN, 217 } dst_alloc_buf_size_t; 218 219 #ifndef DEFAULT_MPP_DST_FORMAT 220 #define DEFAULT_MPP_DST_FORMAT HAL_PIXEL_FORMAT_RGBA_8888 221 #endif 222 #ifndef DEFAULT_MPP_DST_YUV_FORMAT 223 #define DEFAULT_MPP_DST_YUV_FORMAT HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN 224 #endif 225 #ifndef DEFAULT_MPP_DST_UNCOMP_YUV_FORMAT 226 #define DEFAULT_MPP_DST_UNCOMP_YUV_FORMAT HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN 227 #endif 228 229 typedef struct exynos_mpp_img_info { 230 buffer_handle_t bufferHandle; 231 uint32_t bufferType; 232 uint32_t format; 233 android_dataspace_t dataspace; 234 AcrylicLayer *mppLayer; 235 int acrylicAcquireFenceFd; 236 int acrylicReleaseFenceFd; 237 } exynos_mpp_img_info_t; 238 239 typedef enum { 240 PPC_SCALE_NO = 0, /* no scale */ 241 PPC_SCALE_DOWN_1_4, /* x1/1.xx ~ x1/4 */ 242 PPC_SCALE_DOWN_4_9, /* x1/4 ~ x1/9 */ 243 PPC_SCALE_DOWN_9_16, /* x1/9 ~ x1/16 */ 244 PPC_SCALE_DOWN_16_, /* x1/16 ~ */ 245 PPC_SCALE_UP_1_4, /* x1.xx ~ x4 */ 246 PPC_SCALE_UP_4_, /* x4 ~ */ 247 PPC_SCALE_MAX 248 } scaling_index_t; 249 250 typedef enum { 251 PPC_FORMAT_YUV420 = 0, 252 PPC_FORMAT_YUV422, 253 PPC_FORMAT_RGB32, 254 PPC_FORMAT_SBWC, 255 PPC_FORMAT_P010, 256 PPC_FORMAT_AFBC_RGB, 257 PPC_FORMAT_AFBC_YUV, 258 PPC_FORMAT_FORMAT_MAX 259 } format_index_t; 260 261 typedef enum { 262 PPC_ROT_NO = 0, 263 PPC_ROT, 264 PPC_ROT_MAX 265 } rot_index_t; 266 267 typedef struct ppc_list_for_scaling { 268 float ppcList[PPC_SCALE_MAX]; 269 } ppc_list_for_scaling_t; 270 271 typedef std::map<uint32_t, ppc_list_for_scaling> ppc_table; 272 273 typedef struct dstMetaInfo { 274 uint16_t minLuminance = 0; 275 uint16_t maxLuminance = 0; 276 } dstMetaInfo_t; 277 278 enum 279 { 280 NODE_NONE, 281 NODE_SRC, 282 NODE_DST 283 }; /* nodeType */ 284 285 enum 286 { 287 HAL_TRANSFORM_NONE = 0 288 }; 289 290 enum 291 { 292 HAL_PIXEL_FORMAT_NONE = 0 293 }; 294 295 #define YUV_CHROMA_H_SUBSAMPLE static_cast<uint32_t>(2) // Horizontal 296 #define YUV_CHROMA_V_SUBSAMPLE static_cast<uint32_t>(2) // Vertical 297 #define RESTRICTION_CNT_MAX 1024 298 299 typedef enum restriction_classification { 300 RESTRICTION_RGB = 0, 301 RESTRICTION_YUV, 302 RESTRICTION_MAX 303 } restriction_classification_t; 304 305 typedef struct restriction_key 306 { 307 mpp_phycal_type_t hwType; /* MPP_DPP_VG, MPP_DPP_VGFS, ... */ 308 uint32_t nodeType; /* src or dst */ 309 uint32_t format; /* HAL format */ 310 uint32_t reserved; 311 } restriction_key_t; 312 313 typedef struct restriction_size 314 { 315 static constexpr size_t kNumofRestriction = 16; 316 union { 317 std::array<uint32_t, kNumofRestriction> mData; 318 struct { 319 uint32_t maxDownScale; 320 uint32_t maxUpScale; 321 uint32_t maxFullWidth; 322 uint32_t maxFullHeight; 323 uint32_t minFullWidth; 324 uint32_t minFullHeight; 325 uint32_t fullWidthAlign; 326 uint32_t fullHeightAlign; 327 uint32_t maxCropWidth; 328 uint32_t maxCropHeight; 329 uint32_t minCropWidth; 330 uint32_t minCropHeight; 331 uint32_t cropXAlign; 332 uint32_t cropYAlign; 333 uint32_t cropWidthAlign; 334 uint32_t cropHeightAlign; 335 }; 336 }; 337 338 restriction_size() = default; restriction_sizerestriction_size339 restriction_size(std::array<uint32_t, kNumofRestriction> &&rdata) : mData(rdata){}; 340 341 bool operator==(const restriction_size &rhs) const { return rhs.mData == mData; } 342 } restriction_size_t; 343 344 typedef struct restriction_size_element 345 { 346 restriction_key_t key; 347 restriction_size_t sizeRestriction; 348 } restriction_size_element_t; 349 350 typedef struct restriction_table_element 351 { 352 uint32_t classfication_type; 353 const restriction_size_element *table; 354 uint32_t table_element_size; 355 } restriction_table_element_t; 356 /* */ 357 358 #define FORMAT_SHIFT 10 359 #define ROT_SHIFT 20 360 #define PPC_IDX(x,y,z) (x|(y<<FORMAT_SHIFT)|(z<<ROT_SHIFT)) 361 362 const std::map<uint32_t, int32_t> dataspace_standard_map = 363 { 364 {HAL_DATASPACE_STANDARD_UNSPECIFIED, 365 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 366 367 {HAL_DATASPACE_STANDARD_BT709, 368 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 369 370 {HAL_DATASPACE_STANDARD_BT601_625, 371 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 372 373 {HAL_DATASPACE_STANDARD_BT601_625_UNADJUSTED, 374 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 375 376 {HAL_DATASPACE_STANDARD_BT601_525, 377 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 378 379 {HAL_DATASPACE_STANDARD_BT601_525_UNADJUSTED, 380 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 381 382 {HAL_DATASPACE_STANDARD_BT2020, 383 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 384 385 {HAL_DATASPACE_STANDARD_BT2020_CONSTANT_LUMINANCE, 386 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 387 388 {HAL_DATASPACE_STANDARD_BT470M, 389 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 390 391 {HAL_DATASPACE_STANDARD_FILM, 392 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 393 394 {HAL_DATASPACE_STANDARD_DCI_P3, 395 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 396 397 {HAL_DATASPACE_STANDARD_ADOBE_RGB, 398 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS} 399 }; 400 401 const std::map<uint32_t, int32_t> dataspace_transfer_map = 402 { 403 {HAL_DATASPACE_TRANSFER_UNSPECIFIED, 404 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 405 406 {HAL_DATASPACE_TRANSFER_LINEAR, 407 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 408 409 {HAL_DATASPACE_TRANSFER_SRGB, 410 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 411 412 {HAL_DATASPACE_TRANSFER_SMPTE_170M, 413 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 414 415 {HAL_DATASPACE_TRANSFER_GAMMA2_2, 416 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 417 418 {HAL_DATASPACE_TRANSFER_GAMMA2_6, 419 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 420 421 {HAL_DATASPACE_TRANSFER_GAMMA2_8, 422 MPP_ATTR_WCG | MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 423 424 {HAL_DATASPACE_TRANSFER_ST2084, 425 MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS}, 426 427 {HAL_DATASPACE_TRANSFER_HLG, 428 MPP_ATTR_HDR10 | MPP_ATTR_HDR10PLUS} 429 }; 430 431 void dumpExynosMPPImgInfo(uint32_t type, exynos_mpp_img_info &imgInfo); 432 433 struct ExynosMPPFrameInfo 434 { 435 uint32_t srcNum; 436 exynos_image srcInfo[NUM_MPP_SRC_BUFS]; 437 exynos_image dstInfo[NUM_MPP_SRC_BUFS]; 438 }; 439 440 class ExynosMPPSource { 441 public: 442 ExynosMPPSource(); 443 ExynosMPPSource(uint32_t sourceType, void *source); ~ExynosMPPSource()444 ~ExynosMPPSource(){}; 445 void setExynosImage(exynos_image src_img, exynos_image dst_img); 446 void setExynosMidImage(exynos_image mid_img); 447 448 uint32_t mSourceType; 449 void *mSource; 450 exynos_image mSrcImg; 451 exynos_image mDstImg; 452 exynos_image mMidImg; 453 454 ExynosMPP *mOtfMPP; 455 ExynosMPP *mM2mMPP; 456 }; 457 bool exynosMPPSourceComp(const ExynosMPPSource* l, const ExynosMPPSource* r); 458 void dump(const restriction_size_t &restrictionSize, String8 &result); 459 460 class ExynosMPP { 461 private: 462 class ResourceManageThread: public Thread { 463 private: 464 ExynosMPP *mExynosMPP; 465 Condition mCondition; 466 List<exynos_mpp_img_info > mFreedBuffers; 467 List<int> mStateFences; 468 469 void freeBuffers(); 470 bool checkStateFences(); 471 public: 472 bool mRunning; 473 Mutex mMutex; 474 ResourceManageThread(ExynosMPP *exynosMPP); 475 ~ResourceManageThread(); 476 virtual bool threadLoop(); 477 void addFreedBuffer(exynos_mpp_img_info freedBuffer); 478 void addStateFence(int fence); 479 }; 480 481 public: 482 ExynosResourceManager *mResourceManager; 483 /** 484 * Resource type 485 * Ex: MPP_DPP_VGFS, MPP_DPP_VG, MPP_MSC, MPP_G2D 486 */ 487 uint32_t mMPPType; 488 uint32_t mPhysicalType; 489 uint32_t mLogicalType; 490 String8 mName; 491 uint32_t mPhysicalIndex; 492 uint32_t mLogicalIndex; 493 uint32_t mPreAssignDisplayInfo; 494 uint32_t mPreAssignDisplayList[DISPLAY_MODE_NUM]; 495 static int mainDisplayWidth; 496 static int mainDisplayHeight; 497 498 uint32_t mHWState; 499 int mLastStateFenceFd; 500 uint32_t mAssignedState; 501 bool mEnable; 502 503 ExynosDisplay *mAssignedDisplay; 504 505 /* Some resource can support blending feature 506 * then source can be multiple layers */ 507 Vector <ExynosMPPSource* > mAssignedSources; 508 uint32_t mMaxSrcLayerNum; 509 510 uint32_t mPrevAssignedState; 511 int32_t mPrevAssignedDisplayType; 512 int32_t mReservedDisplay; 513 514 android::sp<ResourceManageThread> mResourceManageThread; 515 float mCapacity; 516 float mUsedCapacity; 517 518 union { 519 struct { 520 float mUsedBaseCycles; 521 uint32_t mRotatedSrcCropBW; 522 uint32_t mNoRotatedSrcCropBW; 523 }; 524 }; 525 526 bool mAllocOutBufFlag; 527 bool mFreeOutBufFlag; 528 bool mHWBusyFlag; 529 /* For reuse previous frame */ 530 ExynosMPPFrameInfo mPrevFrameInfo; 531 struct exynos_mpp_img_info mSrcImgs[NUM_MPP_SRC_BUFS]; 532 struct exynos_mpp_img_info mDstImgs[NUM_MPP_DST_BUFS_DEFAULT]; 533 int32_t mCurrentDstBuf; 534 int32_t mPrivDstBuf; 535 bool mNeedCompressedTarget; 536 struct restriction_size mSrcSizeRestrictions[RESTRICTION_MAX]; 537 struct restriction_size mDstSizeRestrictions[RESTRICTION_MAX]; 538 539 // Force Dst buffer reallocation 540 dst_alloc_buf_size_t mDstAllocatedSize; 541 542 /* For libacryl */ 543 Acrylic *mAcrylicHandle; 544 545 bool mUseM2MSrcFence; 546 /* MPP's attribute bit (supported feature bit) */ 547 uint64_t mAttr; 548 549 bool mNeedSolidColorLayer; 550 551 ExynosMPP(ExynosResourceManager* resourceManager, 552 uint32_t physicalType, uint32_t logicalType, const char *name, 553 uint32_t physicalIndex, uint32_t logicalIndex, uint32_t preAssignInfo); 554 virtual ~ExynosMPP(); 555 556 int32_t allocOutBuf(uint32_t w, uint32_t h, uint32_t format, uint64_t usage, uint32_t index); 557 int32_t setOutBuf(buffer_handle_t outbuf, int32_t fence); 558 int32_t freeOutBuf(exynos_mpp_img_info dst); 559 int32_t doPostProcessing(struct exynos_image &src, struct exynos_image &dst); 560 int32_t doPostProcessing(uint32_t totalImags, uint32_t imageIndex, struct exynos_image &src, struct exynos_image &dst); 561 int32_t setupRestriction(); 562 int32_t getSrcReleaseFence(uint32_t srcIndex); 563 int32_t resetSrcReleaseFence(); 564 int32_t getDstImageInfo(exynos_image *img); 565 int32_t setDstAcquireFence(int releaseFence); 566 int32_t resetDstReleaseFence(); 567 int32_t requestHWStateChange(uint32_t state); 568 int32_t setHWStateFence(int32_t fence); 569 virtual int64_t isSupported(ExynosDisplay &display, struct exynos_image &src, struct exynos_image &dst); 570 571 bool isDataspaceSupportedByMPP(struct exynos_image &src, struct exynos_image &dst); 572 bool isSupportedHDR10Plus(struct exynos_image &src, struct exynos_image &dst); 573 bool isSupportedBlend(struct exynos_image &src); 574 virtual bool isSupportedTransform(struct exynos_image &src); 575 bool isSupportedCapability(ExynosDisplay &display, struct exynos_image &src); 576 bool isSupportedDRM(struct exynos_image &src); 577 virtual bool isSupportedHStrideCrop(struct exynos_image &src); 578 bool checkDownscaleCap(const float resolution, const float displayRatio_V) const; 579 virtual uint32_t getDownscaleRestriction(const struct exynos_image &src, 580 const struct exynos_image &dst) const; 581 virtual uint32_t getMaxDownscale(const ExynosDisplay &display, const struct exynos_image &src, 582 const struct exynos_image &dst) const; 583 virtual uint32_t getMaxUpscale(const struct exynos_image &src, 584 const struct exynos_image &dst) const; 585 uint32_t getSrcMaxWidth(struct exynos_image &src); 586 uint32_t getSrcMaxHeight(struct exynos_image &src); 587 uint32_t getSrcMinWidth(struct exynos_image &src); 588 uint32_t getSrcMinWidth(uint32_t idx); 589 uint32_t getSrcMinHeight(struct exynos_image &src); 590 uint32_t getSrcMinHeight(uint32_t idx); 591 uint32_t getSrcWidthAlign(struct exynos_image &src); 592 uint32_t getSrcHeightAlign(struct exynos_image &src); 593 uint32_t getSrcMaxCropWidth(struct exynos_image &src); 594 uint32_t getSrcMaxCropHeight(struct exynos_image &src); 595 virtual uint32_t getSrcMaxCropSize(struct exynos_image &src); 596 uint32_t getSrcMinCropWidth(struct exynos_image &src); 597 uint32_t getSrcMinCropHeight(struct exynos_image &src); 598 virtual uint32_t getSrcXOffsetAlign(struct exynos_image &src); 599 uint32_t getSrcXOffsetAlign(uint32_t idx); 600 uint32_t getSrcYOffsetAlign(struct exynos_image &src); 601 uint32_t getSrcYOffsetAlign(uint32_t idx); 602 uint32_t getSrcCropWidthAlign(const struct exynos_image &src) const; 603 uint32_t getSrcCropWidthAlign(uint32_t idx) const; 604 uint32_t getSrcCropHeightAlign(const struct exynos_image &src) const; 605 uint32_t getSrcCropHeightAlign(uint32_t idx) const; 606 virtual bool isSrcFormatSupported(struct exynos_image &src); 607 virtual bool isDimLayerSupported(); 608 int32_t isSupportThis(uint32_t mSupportAttr); 609 610 uint32_t getDstMaxWidth(struct exynos_image &dst); 611 uint32_t getDstMaxHeight(struct exynos_image &dst); 612 uint32_t getDstMinWidth(struct exynos_image &dst); 613 uint32_t getDstMinHeight(struct exynos_image &dst); 614 virtual uint32_t getDstWidthAlign(const struct exynos_image &dst) const; 615 uint32_t getDstHeightAlign(const struct exynos_image &dst) const; 616 uint32_t getDstXOffsetAlign(struct exynos_image &dst); 617 uint32_t getDstYOffsetAlign(struct exynos_image &dst); 618 uint32_t getOutBufAlign(); 619 virtual bool isDstFormatSupported(struct exynos_image &dst); 620 int32_t isSupportLayerColorTransform( 621 struct exynos_image &src, struct exynos_image &dst); 622 uint32_t getSrcMaxBlendingNum(struct exynos_image &src, struct exynos_image &dst); 623 uint32_t getAssignedSourceNum(); 624 625 /* Based on multi-resolution support */ 626 void setDstAllocSize(uint32_t width, uint32_t height); 627 dst_alloc_buf_size_t getDstAllocSize(); 628 virtual bool needPreAllocation(); 629 630 int32_t resetMPP(); 631 int32_t resetAssignedState(); 632 int32_t resetAssignedState(ExynosMPPSource *mppSource); 633 int32_t reserveMPP(int32_t displayType = -1); 634 635 bool isAssignableState(ExynosDisplay *display, struct exynos_image &src, struct exynos_image &dst); 636 bool isAssignable(ExynosDisplay *display, 637 struct exynos_image &src, struct exynos_image &dst); 638 int32_t assignMPP(ExynosDisplay *display, ExynosMPPSource* mppSource); 639 640 bool hasEnoughCapa(ExynosDisplay *display, struct exynos_image &src, struct exynos_image &dst); 641 float getRequiredCapacity(ExynosDisplay *display, struct exynos_image &src, struct exynos_image &dst); 642 int32_t updateUsedCapacity(); 643 void resetUsedCapacity(); 644 int prioritize(int priority); 645 getMPPClockKhz()646 uint32_t getMPPClockKhz() { return mClockKhz; }; 647 648 void dump(String8& result); 649 uint32_t increaseDstBuffIndex(); 650 bool canSkipProcessing(); 651 652 virtual bool isSupportedCompression(struct exynos_image &src); 653 654 void closeFences(); 655 656 void reloadResourceForHWFC(); 657 void setTargetDisplayLuminance(uint16_t min, uint16_t max); 658 void setTargetDisplayDevice(int device); 659 660 virtual bool checkRotationCondition(struct exynos_image &src); 661 void updateAttr(); 662 dstMetaInfo getDstMetaInfo(android_dataspace_t dstDataspace); 663 float getAssignedCapacity(); 664 setPPC(float ppc)665 void setPPC(float ppc) { mPPC = ppc; }; setClockKhz(uint32_t clock)666 void setClockKhz(uint32_t clock) { mClockKhz = clock; }; 667 668 protected: 669 uint32_t getBufferType(uint64_t usage); 670 uint32_t getBufferType(const buffer_handle_t handle); 671 uint64_t getBufferUsage(uint64_t usage); 672 bool needCompressDstBuf() const; 673 bool needDstBufRealloc(struct exynos_image &dst, uint32_t index); 674 bool canUsePrevFrame(); 675 int32_t setupDst(exynos_mpp_img_info *dstImgInfo); 676 virtual int32_t doPostProcessingInternal(); 677 virtual int32_t setupLayer(exynos_mpp_img_info *srcImgInfo, 678 struct exynos_image &src, struct exynos_image &dst); setColorConversionInfo()679 virtual int32_t setColorConversionInfo() { return NO_ERROR; }; 680 681 uint32_t getRestrictionClassification(const struct exynos_image &img) const; 682 683 /* 684 * getPPC for src, dst referencing mppSources in mAssignedSources and 685 * assignCheckSrc, assignCheckDst that are likely to be added to the mAssignedSources 686 */ 687 float getPPC(const struct exynos_image &src, const struct exynos_image &dst, 688 const struct exynos_image &criteria, 689 const struct exynos_image *assignCheckSrc = NULL, 690 const struct exynos_image *assignCheckDst = NULL); getPPC()691 float getPPC() { return mPPC; }; 692 693 /* format and rotation index are defined by indexImage */ 694 void getPPCIndex(const struct exynos_image &indexImage, 695 const struct exynos_image &refImage, 696 uint32_t &formatIndex, uint32_t &rotIndex, uint32_t &scaleIndex, 697 const struct exynos_image &criteria); 698 699 float getRequiredBaseCycles(struct exynos_image &src, struct exynos_image &dst); 700 bool addCapacity(ExynosMPPSource* mppSource); 701 bool removeCapacity(ExynosMPPSource* mppSource); 702 /* 703 * This should be called by isCSCSupportedByMPP() 704 * This function checks additional restriction for color space conversion 705 */ 706 virtual bool checkCSCRestriction(struct exynos_image &src, struct exynos_image &dst); 707 708 uint32_t mClockKhz = 0; 709 float mPPC = 0; 710 }; 711 712 #endif //_EXYNOSMPP_H 713