Home
last modified time | relevance | path

Searched refs:AsCpuRegister (Results 1 – 12 of 12) sorted by relevance

/art/compiler/utils/x86_64/
Djni_macro_assembler_x86_64.cc60 __ pushq(spill.AsCpuRegister()); in BuildFrame()
63 cfi().RelOffset(DWARFReg(spill.AsCpuRegister().AsRegister()), 0); in BuildFrame()
90 __ movq(Address(CpuRegister(RSP), 0), method_reg.AsX86_64().AsCpuRegister()); in BuildFrame()
123 __ popq(spill.AsCpuRegister()); in RemoveFrame()
125 cfi().Restore(DWARFReg(spill.AsCpuRegister().AsRegister())); in RemoveFrame()
161 __ movl(Address(CpuRegister(RSP), offs), src.AsCpuRegister()); in Store()
164 __ movq(Address(CpuRegister(RSP), offs), src.AsCpuRegister()); in Store()
190 __ movl(Address(CpuRegister(RSP), dest), src.AsCpuRegister()); in StoreRef()
196 __ movq(Address(CpuRegister(RSP), dest), src.AsCpuRegister()); in StoreRawPtr()
227 __ movl(dest.AsCpuRegister(), Address(CpuRegister(RSP), src)); in Load()
[all …]
Dmanaged_register_x86_64.h90 constexpr CpuRegister AsCpuRegister() const { in AsCpuRegister() function
109 return FromRegId(AllocIdLow()).AsCpuRegister(); in AsRegisterPairLow()
115 return FromRegId(AllocIdHigh()).AsCpuRegister(); in AsRegisterPairHigh()
Dmanaged_register_x86_64.cc101 os << "CPU: " << static_cast<int>(AsCpuRegister().AsRegister()); in Print()
Dmanaged_register_x86_64_test.cc37 EXPECT_EQ(RAX, reg.AsCpuRegister()); in TEST()
45 EXPECT_EQ(RBX, reg.AsCpuRegister()); in TEST()
53 EXPECT_EQ(RCX, reg.AsCpuRegister()); in TEST()
61 EXPECT_EQ(RDI, reg.AsCpuRegister()); in TEST()
Dassembler_x86_64.cc5513 CpuRegister vvvv = operand.AsCpuRegister(); in EmitVexPrefixByteOne()
5545 CpuRegister vvvv = operand.AsCpuRegister(); in EmitVexPrefixByteTwo()
/art/compiler/utils/x86/
Djni_macro_assembler_x86.cc69 Register spill = spill_regs[i].AsX86().AsCpuRegister(); in BuildFrame()
85 __ pushl(method_reg.AsX86().AsCpuRegister()); in BuildFrame()
103 Register spill = spill_regs[i].AsX86().AsCpuRegister(); in RemoveFrame()
140 __ movl(Address(ESP, offs), src.AsCpuRegister()); in Store()
164 __ movl(Address(ESP, dest), src.AsCpuRegister()); in StoreRef()
170 __ movl(Address(ESP, dest), src.AsCpuRegister()); in StoreRawPtr()
199 __ movl(dest.AsCpuRegister(), Address(ESP, src)); in Load()
226 __ fs()->movzxb(dest.AsCpuRegister(), Address::Absolute(src)); in LoadFromThread()
229 __ fs()->movl(dest.AsCpuRegister(), Address::Absolute(src)); in LoadFromThread()
254 __ movl(dest.AsCpuRegister(), Address(ESP, src)); in LoadRef()
[all …]
Dmanaged_register_x86.h93 CHECK_LT(AsCpuRegister(), ESP); // ESP, EBP, ESI and EDI cannot be encoded as byte registers. in AsByteRegister()
97 constexpr Register AsCpuRegister() const { in AsCpuRegister() function
116 return FromRegId(AllocIdLow()).AsCpuRegister(); in AsRegisterPairLow()
122 return FromRegId(AllocIdHigh()).AsCpuRegister(); in AsRegisterPairHigh()
Dmanaged_register_x86.cc106 os << "CPU: " << AsCpuRegister(); in Print()
Dmanaged_register_x86_test.cc38 EXPECT_EQ(EAX, reg.AsCpuRegister()); in TEST()
46 EXPECT_EQ(EBX, reg.AsCpuRegister()); in TEST()
54 EXPECT_EQ(ECX, reg.AsCpuRegister()); in TEST()
62 EXPECT_EQ(EDI, reg.AsCpuRegister()); in TEST()
Dassembler_x86.cc4047 Register vvvv = operand.AsCpuRegister(); in EmitVexPrefixByteOne()
4078 Register vvvv = operand.AsCpuRegister(); in EmitVexPrefixByteTwo()
/art/compiler/jni/quick/x86/
Dcalling_convention_x86.cc50 result |= (1 << r.AsX86().AsCpuRegister()); in CalculateCoreCalleeSpillMask()
/art/compiler/jni/quick/x86_64/
Dcalling_convention_x86_64.cc56 result |= (1u << r.AsX86_64().AsCpuRegister().AsRegister()); in CalculateCoreCalleeSpillMask()