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Searched refs:IsCoreRegister (Results 1 – 5 of 5) sorted by relevance

/art/compiler/utils/arm/
Dmanaged_register_arm.h89 CHECK(IsCoreRegister()); in AsCoreRegister()
137 constexpr bool IsCoreRegister() const { in IsCoreRegister() function
171 (IsCoreRegister() && test.IsCoreRegister()) || in IsSameType()
Dmanaged_register_arm_test.cc33 EXPECT_TRUE(reg.IsCoreRegister()); in TEST()
41 EXPECT_TRUE(reg.IsCoreRegister()); in TEST()
50 EXPECT_TRUE(reg.IsCoreRegister()); in TEST()
59 EXPECT_TRUE(reg.IsCoreRegister()); in TEST()
71 EXPECT_TRUE(!reg.IsCoreRegister()); in TEST()
80 EXPECT_TRUE(!reg.IsCoreRegister()); in TEST()
89 EXPECT_TRUE(!reg.IsCoreRegister()); in TEST()
98 EXPECT_TRUE(!reg.IsCoreRegister()); in TEST()
107 EXPECT_TRUE(!reg.IsCoreRegister()); in TEST()
116 EXPECT_TRUE(!reg.IsCoreRegister()); in TEST()
[all …]
Djni_macro_assembler_arm_vixl.cc48 CHECK(reg.IsCoreRegister()); in AsVIXLRegister()
95 if (reg.AsArm().IsCoreRegister()) { in BuildFrame()
149 if (reg.AsArm().IsCoreRegister()) { in RemoveFrame()
274 } else if (src.IsCoreRegister()) { in Store()
425 return reg.IsCoreRegister() || reg.IsRegisterPair(); in IsCoreRegisterOrPair()
496 if (reg.IsCoreRegister()) { in GetCoreRegisterMask()
523 srcs[start].GetRegister().AsArm().IsCoreRegister() && in UseStrdForChunk()
524 srcs[start + 1u].GetRegister().AsArm().IsCoreRegister(); in UseStrdForChunk()
735 if (dst.IsCoreRegister()) { in Move()
749 if (dst.IsCoreRegister()) { in Move()
[all …]
Dmanaged_register_arm.cc78 } else if (IsCoreRegister()) { in Print()
/art/compiler/jni/quick/arm/
Dcalling_convention_arm.cc104 if (r.AsArm().IsCoreRegister()) { in CalculateCoreCalleeSpillMask()