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Searched refs:IsRegister (Results 1 – 25 of 32) sorted by relevance

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/art/compiler/utils/arm/
Djni_macro_assembler_arm_vixl.cc104 !method_reg.IsRegister()) { in BuildFrame()
130 CHECK_GE(frame_size, (pushed_values + (method_reg.IsRegister() ? 1u : 0u)) * kFramePointerSize); in BuildFrame()
133 if (method_reg.IsRegister()) { in BuildFrame()
429 DCHECK(!loc1.IsRegister()); in NoSpillGap()
430 DCHECK(!loc2.IsRegister()); in NoSpillGap()
454 if (!first_src.IsRegister()) { in GetSpillChunkSize()
460 !srcs[start + 1u].IsRegister() && in GetSpillChunkSize()
476 srcs[end].IsRegister() && in GetSpillChunkSize()
485 srcs[end].IsRegister() && in GetSpillChunkSize()
509 DCHECK(loc.IsRegister()); in GetCoreRegisterMask()
[all …]
/art/compiler/utils/
Djni_macro_assembler.h50 DCHECK(reg.IsRegister()); in ArgumentLocation()
56 bool IsRegister() const { in IsRegister() function
57 return reg_.IsRegister(); in IsRegister()
61 DCHECK(IsRegister()); in GetRegister()
66 DCHECK(!IsRegister()); in GetFrameOffset()
Dmanaged_register.h61 constexpr bool IsRegister() const { in IsRegister() function
/art/compiler/optimizing/
Dlocations.h145 bool IsRegister() const { in IsRegister() function
162 return IsRegister() || IsFpuRegister() || IsRegisterPair() || IsFpuRegisterPair(); in IsRegisterKind()
166 DCHECK(IsRegister() || IsFpuRegister()); in reg()
182 DCHECK(IsRegister()); in AsRegister()
452 if (loc.IsRegister()) { in Add()
461 if (loc.IsRegister()) { in Remove()
682 return input.IsRegister() in IsFixedInput()
Dcode_generator_x86_64.cc296 DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg())); in EmitNativeCode()
841 DCHECK(index_.IsRegister()); in EmitNativeCode()
1617 if (destination.IsRegister()) { in Move()
1619 if (source.IsRegister()) { in Move()
1638 if (source.IsRegister()) { in Move()
1657 if (source.IsRegister()) { in Move()
1674 if (source.IsRegister()) { in Move()
1694 DCHECK(location.IsRegister()); in MoveConstant()
1704 if (location.IsRegister()) { in AddLocationAsTemp()
1920 if (lhs.IsRegister()) { in GenerateTestAndBranch()
[all …]
Dregister_allocator_linear_scan.cc133 DCHECK(location.IsRegister() || location.IsFpuRegister()); in BlockRegister()
134 LiveInterval* interval = location.IsRegister() in BlockRegister()
137 DataType::Type type = location.IsRegister() in BlockRegister()
142 if (location.IsRegister()) { in BlockRegister()
233 if (temp.IsRegister() || temp.IsFpuRegister()) { in ProcessInstruction()
292 if (input.IsRegister() || input.IsFpuRegister()) { in ProcessInstruction()
347 if (first.IsRegister() || first.IsFpuRegister()) { in ProcessInstruction()
357 } else if (output.IsRegister() || output.IsFpuRegister()) { in ProcessInstruction()
Dlocations.cc100 if (location.IsRegister() || location.IsFpuRegister()) { in operator <<()
Dcommon_arm64.h67 DCHECK(location.IsRegister()) << location; in XRegisterFrom()
72 DCHECK(location.IsRegister()) << location; in WRegisterFrom()
169 if (location.IsRegister()) { in OperandFrom()
Dcommon_arm.h66 DCHECK(location.IsRegister()) << location; in RegisterFrom()
191 if (location.IsRegister()) { in OperandFrom()
Dcode_generator_x86.cc314 DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg())); in EmitNativeCode()
1357 if (destination.IsRegister()) { in Move32()
1358 if (source.IsRegister()) { in Move32()
1370 if (source.IsRegister()) { in Move32()
1380 if (source.IsRegister()) { in Move32()
1609 DCHECK(location.IsRegister()); in MoveConstant()
1625 if (location.IsRegister()) { in AddLocationAsTemp()
1923 if (lhs.IsRegister()) { in GenerateTestAndBranch()
2113 if (true_loc.IsRegister()) { in VisitSelect()
2728 DCHECK(in.IsRegister()); in VisitNeg()
[all …]
Dregister_allocator_graph_color.cc882 if (input.IsRegister() || input.IsFpuRegister()) { in CheckForFixedInputs()
907 if (out.IsRegister() || out.IsFpuRegister()) { in CheckForFixedOutput()
955 if (temp.IsRegister() || temp.IsFpuRegister()) { in CheckForTempLiveIntervals()
1062 DCHECK(location.IsRegister() || location.IsFpuRegister()); in BlockRegister()
1064 LiveInterval* interval = location.IsRegister() in BlockRegister()
1068 bool blocked_by_codegen = location.IsRegister() in BlockRegister()
1438 if (input.IsRegister() || input.IsFpuRegister()) { in FindCoalesceOpportunities()
1441 InterferenceNode* fixed_node = input.IsRegister() in FindCoalesceOpportunities()
Dcode_generator_arm_vixl.cc555 DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg())); in EmitNativeCode()
856 DCHECK(index_.IsRegister()); in EmitNativeCode()
1816 if (!out.IsRegister() && !out.IsRegisterPair()) { in CanGenerateConditionalMove()
1828 if (out.IsRegister()) { in CanGenerateConditionalMove()
2525 if (destination.IsRegister()) { in Move32()
2526 if (source.IsRegister()) { in Move32()
2537 if (source.IsRegister()) { in Move32()
2546 if (source.IsRegister()) { in Move32()
2564 DCHECK(location.IsRegister()); in MoveConstant()
2577 if (location.IsRegister()) { in AddLocationAsTemp()
[all …]
Dcode_generator_arm64.cc309 DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg())); in EmitNativeCode()
694 DCHECK(index_.IsRegister()); in EmitNativeCode()
1094 if (loc.IsRegister()) { in FreeScratchLocation()
1293 DCHECK(location.IsRegister()); in MoveConstant()
1298 if (location.IsRegister()) { in AddLocationAsTemp()
1462 if (destination.IsRegister() || destination.IsFpuRegister()) { in MoveLocation()
1470 dst_type = destination.IsRegister() ? DataType::Type::kInt32 : DataType::Type::kFloat32; in MoveLocation()
1476 dst_type = destination.IsRegister() ? DataType::Type::kInt64 : DataType::Type::kFloat64; in MoveLocation()
1480 (destination.IsRegister() && !DataType::IsFloatingPointType(dst_type))); in MoveLocation()
1490 } else if (source.IsRegister()) { in MoveLocation()
[all …]
Dintrinsics_x86_64.cc1589 DCHECK(srcBegin.IsRegister()); in VisitStringGetCharsNoCheck()
2294 if (src.IsRegister()) { in GenBitCount()
2367 src.IsRegister()) { in GenOneBit()
2373 if (src.IsRegister()) { in GenOneBit()
2401 if (src.IsRegister()) { in GenOneBit()
2488 if (src.IsRegister()) { in GenLeadingZeros()
2561 if (src.IsRegister()) { in GenTrailingZeros()
Dssa_liveness_analysis.cc486 return other.IsRegister(); in SameRegisterKind()
Dssa_liveness_analysis.h964 && (locations->InAt(0).IsRegister() in DefinitionRequiresRegister()
975 } else if (location.IsRegister() || location.IsRegisterPair()) { in DefinitionRequiresRegister()
Dparallel_move_test.cc44 } else if (location.IsRegister()) { in DumpLocationForTest()
Dintrinsics_x86.cc572 if (codegen->GetInstructionSetFeatures().HasAVX2() && src.IsRegister()) { in GenLowestOneBit()
578 if (src.IsRegister()) { in GenLowestOneBit()
586 if (src.IsRegister()) { in GenLowestOneBit()
1419 DCHECK(srcBegin.IsRegister()); in VisitStringGetCharsNoCheck()
2314 if (src.IsRegister()) { in GenBitCount()
2383 if (src.IsRegister()) { in GenLeadingZeros()
2487 if (src.IsRegister()) { in GenTrailingZeros()
3659 out.IsRegister() ? out.AsRegister<Register>() : locations->GetTemp(1).AsRegister<Register>(); in GenerateVarHandleGet()
Dregister_allocation_resolver.cc499 return destination.IsRegister() in IsValidDestination()
Dintrinsics_arm_vixl.cc173 DCHECK(tmp.IsRegister()) << tmp; in EmitNativeCode()
1619 if (length.IsRegister()) { in VisitSystemArrayCopy()
3250 DCHECK(expected.IsRegister() || in GenerateCompareAndSet()
3252 DCHECK(new_value.IsRegister()); in GenerateCompareAndSet()
3253 DCHECK(old_value.IsRegister()); in GenerateCompareAndSet()
3276 !(kEmitCompilerReadBarrier && type == DataType::Type::kReference && expected.IsRegister()); in GenerateCompareAndSet()
3616 DCHECK(maybe_temp.IsRegister()); in GenerateGetAndUpdate()
/art/compiler/utils/x86_64/
Djni_macro_assembler_x86_64.cc89 if (method_reg.IsRegister()) { in BuildFrame()
364 if (dest.IsRegister()) { in MoveArguments()
365 if (src.IsRegister() && src.GetRegister().Equals(dest.GetRegister())) { in MoveArguments()
368 if (src.IsRegister()) { in MoveArguments()
374 if (src.IsRegister()) { in MoveArguments()
388 if (!dest.IsRegister()) { in MoveArguments()
398 if (src.IsRegister()) { in MoveArguments()
/art/compiler/utils/arm64/
Djni_macro_assembler_arm64.cc364 if (dest.IsRegister()) { in MoveArguments()
365 if (src.IsRegister() && src.GetRegister().Equals(dest.GetRegister())) { in MoveArguments()
368 if (src.IsRegister()) { in MoveArguments()
374 if (src.IsRegister()) { in MoveArguments()
388 if (!dest.IsRegister()) { in MoveArguments()
398 if (src.IsRegister()) { in MoveArguments()
799 core_reg_size + fp_reg_size + (method_reg.IsRegister() ? kXRegSizeInBytes : 0u)); in BuildFrame()
806 if (method_reg.IsRegister()) { in BuildFrame()
/art/compiler/utils/x86/
Djni_macro_assembler_x86.cc79 (method_reg.IsRegister() ? kFramePointerSize /*method*/ : 0u); in BuildFrame()
84 if (method_reg.IsRegister()) { in BuildFrame()
311 if (src.IsRegister()) { in MoveArguments()
312 if (UNLIKELY(dest.IsRegister())) { in MoveArguments()
330 if (!src.IsRegister()) { in MoveArguments()
331 DCHECK(!dest.IsRegister()); in MoveArguments()
/art/disassembler/
Ddisassembler_arm64.cc47 if (reg.IsRegister() && reg.Is64Bits()) { in AppendRegisterNameToOutput()
/art/compiler/jni/quick/
Djni_compiler.cc437 if (method_register.IsRegister()) { in ArtJniCompileMethodInternal()

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