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Searched refs:high (Results 1 – 25 of 36) sorted by relevance

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/art/compiler/utils/x86/
Dmanaged_register_x86.cc43 Register high; member
48 #define REGISTER_PAIR_ENUMERATION(low, high) { low##_##high, low, high }, argument
69 Register high = AsRegisterPairHigh(); in Overlaps() local
71 X86ManagedRegister::FromCpuRegister(high).Overlaps(other); in Overlaps()
94 return kRegisterPairs[r].high; in AllocIdHigh()
/art/compiler/utils/x86_64/
Dmanaged_register_x86_64.cc42 Register high; member
47 #define REGISTER_PAIR_ENUMERATION(low, high) { low##_##high, low, high }, argument
64 Register high = AsRegisterPairHigh().AsRegister(); in Overlaps() local
66 X86_64ManagedRegister::FromCpuRegister(high).Overlaps(other); in Overlaps()
89 return kRegisterPairs[r].high; in AllocIdHigh()
/art/compiler/utils/arm/
Dmanaged_register_arm.cc30 Register high = AsRegisterPairHigh(); in Overlaps() local
32 ArmManagedRegister::FromCoreRegister(high).Overlaps(other); in Overlaps()
38 SRegister high = AsOverlappingDRegisterHigh(); in Overlaps() local
40 return (low == other_sreg) || (high == other_sreg); in Overlaps()
/art/compiler/utils/arm64/
Dmanaged_register_arm64.cc79 int high = RegNo(); in RegIdHigh() local
81 high += kNumberOfXRegIds + kNumberOfWRegIds; in RegIdHigh()
83 return high; in RegIdHigh()
/art/compiler/optimizing/
Dlocations.h137 static Location RegisterPairLocation(int low, int high) { in RegisterPairLocation() argument
138 return Location(kRegisterPair, low << 16 | high); in RegisterPairLocation()
141 static Location FpuRegisterPairLocation(int low, int high) { in FpuRegisterPairLocation() argument
142 return Location(kFpuRegisterPair, low << 16 | high); in FpuRegisterPairLocation()
175 int high() const { in high() function
201 return static_cast<T>(high()); in AsRegisterPairHigh()
213 return static_cast<T>(high()); in AsFpuRegisterPairHigh()
233 return Location::RegisterLocation(high()); in ToHigh()
235 return Location::FpuRegisterLocation(high()); in ToHigh()
489 return ContainsCoreRegister(out.low()) || ContainsCoreRegister(out.high()); in OverlapsRegisters()
[all …]
Dintrinsics.cc123 int32_t high = GetIntegerCacheField(cache_class, kHighFieldName); in CheckIntegerCache() local
124 if (boot_image_cache->GetLength() != high - low + 1) { in CheckIntegerCache()
198 int32_t high = GetIntegerCacheField(cache_class, kHighFieldName); in ComputeIntegerValueOfLocations() local
202 CHECK_EQ(current_cache->GetLength(), high - low + 1); in ComputeIntegerValueOfLocations()
214 static_cast<uint32_t>(high - low + 1)) { in ComputeIntegerValueOfLocations()
307 int32_t high = GetIntegerCacheField(cache_class, kHighFieldName); in ComputeIntegerValueOfInfo() local
308 info.length = dchecked_integral_cast<uint32_t>(high - info.low + 1); in ComputeIntegerValueOfInfo()
Dcommon_arm.h212 const vixl::aarch32::Register& high) { in LocationFrom() argument
213 return Location::RegisterPairLocation(low.GetCode(), high.GetCode()); in LocationFrom()
217 const vixl::aarch32::SRegister& high) { in LocationFrom() argument
218 return Location::FpuRegisterPairLocation(low.GetCode(), high.GetCode()); in LocationFrom()
Dregister_allocator.cc219 LiveInterval* high = interval->GetHighInterval()->SplitAt(position); in Split() local
220 new_interval->SetHighInterval(high); in Split()
221 high->SetLowInterval(new_interval); in Split()
Dregister_allocator_linear_scan.cc256 LiveInterval* high = interval->GetHighInterval(); in ProcessInstruction() local
257 temp_intervals_.push_back(high); in ProcessInstruction()
258 unhandled_fp_intervals_.push_back(high); in ProcessInstruction()
353 LiveInterval* high = current->GetHighInterval(); in ProcessInstruction() local
354 high->SetRegister(first.high()); in ProcessInstruction()
355 high->SetFrom(position + 1); in ProcessInstruction()
365 LiveInterval* high = current->GetHighInterval(); in ProcessInstruction() local
366 high->SetRegister(output.high()); in ProcessInstruction()
367 high->SetFrom(position + 1); in ProcessInstruction()
Dlocations.cc103 os << location.low() << ":" << location.high(); in operator <<()
Dcode_generator.cc1485 int high = location.high(); in EmitVRegInfo() local
1492 if (slow_path != nullptr && slow_path->IsFpuRegisterSaved(high)) { in EmitVRegInfo()
1493 uint32_t offset = slow_path->GetStackOffsetOfFpuRegister(high); in EmitVRegInfo()
1497 stack_map_stream->AddDexRegisterEntry(Kind::kInFpuRegister, high); in EmitVRegInfo()
1506 int high = location.high(); in EmitVRegInfo() local
1513 if (slow_path != nullptr && slow_path->IsCoreRegisterSaved(high)) { in EmitVRegInfo()
1514 uint32_t offset = slow_path->GetStackOffsetOfCoreRegister(high); in EmitVRegInfo()
1517 stack_map_stream->AddDexRegisterEntry(Kind::kInRegister, high); in EmitVRegInfo()
Dparallel_move_resolver.cc94 return Location::RegisterLocation(location.high()); in HighOf()
96 return Location::FpuRegisterLocation(location.high()); in HighOf()
Dcode_generator_x86.cc3634 Immediate high(high_value); in VisitMul() local
3636 __ movl(eax, high); in VisitMul()
4673 Register high = loc.AsRegisterPairHigh<Register>(); in GenerateShlLong() local
4677 __ adcl(high, high); in GenerateShlLong()
4689 __ movl(high, low); in GenerateShlLong()
4690 __ shll(high, Immediate(shift - 32)); in GenerateShlLong()
4694 __ shld(high, low, Immediate(shift)); in GenerateShlLong()
4712 Register high = loc.AsRegisterPairHigh<Register>(); in GenerateShrLong() local
4715 DCHECK_NE(low, high); in GenerateShrLong()
4716 __ movl(low, high); in GenerateShrLong()
[all …]
Dregister_allocator_graph_color.cc699 LiveInterval* high = interval->GetHighInterval(); in AllocateRegisters() local
700 DCHECK(high->HasRegister()); in AllocateRegisters()
702 ? Location::RegisterLocation(high->GetRegister()) in AllocateRegisters()
703 : Location::FpuRegisterLocation(high->GetRegister()); in AllocateRegisters()
913 interval->GetHighInterval()->SetRegister(out.high()); in CheckForFixedOutput()
/art/test/568-checker-onebit/
Dinfo.txt1 Unit test for 32-bit and 64-bit high/low-bit operations.
/art/test/543-env-long-ref/
Dinfo.txt3 was overwriting the high dex register of a wide value.
/art/test/550-checker-regression-wide-store/
Dinfo.txt1 Test an SsaBuilder regression where storing into the high vreg of a pair
/art/runtime/native/
Dlibcore_util_CharsetUtils.cc141 jchar high = static_cast<jchar>(ch); in CharsetUtils_toUtf8Bytes() local
143 if (!U16_IS_SURROGATE_LEAD(high) || !U16_IS_SURROGATE_TRAIL(low)) { in CharsetUtils_toUtf8Bytes()
149 ch = U16_GET_SUPPLEMENTARY(high, low); in CharsetUtils_toUtf8Bytes()
Djava_lang_StringFactory.cc34 jint high, jint offset, jint byte_count) { in StringFactory_newStringFromBytes() argument
54 high, in StringFactory_newStringFromBytes()
Djava_lang_Class.cc374 size_t high = fields->size(); in FindFieldByName() local
380 while (low < high) { in FindFieldByName()
381 auto mid = (low + high) / 2; in FindFieldByName()
399 high = mid; in FindFieldByName()
/art/test/550-checker-regression-wide-store/smali/
DTestCase.smali25 # Test storing into the high vreg of a wide pair. This scenario has runtime
53 # Test that storing a wide invalidates the value in the high vreg. This
/art/runtime/interpreter/mterp/arm/
Dother.S30 FETCH r1, 2 @ r1<- BBBB (high)
81 FETCH r2, 2 @ r2<- BBBB (high)
98 FETCH r2, 3 @ r2<- hhhh (high middle)
100 FETCH r3, 4 @ r3<- HHHH (high)
102 orr r1, r2, r3, lsl #16 @ r1<- HHHHhhhh (high word)
126 FETCH_S r2, 2 @ r2<- ssssBBBB (high)
/art/runtime/interpreter/mterp/armng/
Dother.S8 FETCH r1, 2 @ r1<- BBBB (high)
90 FETCH r2, 3 @ r2<- hhhh (high middle)
92 FETCH r3, 4 @ r3<- HHHH (high)
94 orr r1, r2, r3, lsl #16 @ r1<- HHHHhhhh (high word)
118 FETCH_S r2, 2 @ r2<- ssssBBBB (high)
/art/tools/ahat/src/main/com/android/ahat/dominators/
DDominators.java208 public boolean hasIdInRange(long low, long high) { in hasIdInRange() argument
210 if (low <= ids[i] && ids[i] <= high) { in hasIdInRange()
/art/runtime/entrypoints/quick/
Dquick_alloc_entrypoints.cc104 mirror::ByteArray* byte_array, int32_t high, int32_t offset, int32_t byte_count, \
111 self, byte_count, handle_array, offset, high, allocator_type).Ptr(); \

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