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Searched refs:maybe_temp (Results 1 – 9 of 9) sorted by relevance

/art/compiler/optimizing/
Dintrinsics_arm_vixl.cc2692 Location maybe_temp, in GenerateIntrinsicGet() argument
2720 vixl32::Register strexd_tmp = RegisterFrom(maybe_temp); in GenerateIntrinsicGet()
2737 vixl32::Register temp = RegisterFrom(maybe_temp); in GenerateIntrinsicGet()
2757 vixl32::Register lo = RegisterFrom(maybe_temp); in GenerateIntrinsicGet()
2827 Location maybe_temp = Location::NoLocation(); in GenUnsafeGet() local
2830 maybe_temp = locations->GetTemp(0); in GenUnsafeGet()
2840 maybe_temp, in GenUnsafeGet()
2906 Location maybe_temp, in GenerateIntrinsicSet() argument
2946 vixl32::Register lo_tmp = RegisterFrom(maybe_temp); in GenerateIntrinsicSet()
2963 vixl32::Register lo_tmp = RegisterFrom(maybe_temp); in GenerateIntrinsicSet()
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Dcode_generator_arm_vixl.h402 Location maybe_temp,
418 Location maybe_temp,
681 Location maybe_temp,
Dcode_generator_arm64.h343 Location maybe_temp,
359 Location maybe_temp,
857 Location maybe_temp,
Dcode_generator_arm64.cc2035 Location maybe_temp = in HandleFieldGet() local
2044 maybe_temp, in HandleFieldGet()
2540 Location maybe_temp = in VisitArrayGet() local
2546 maybe_temp, in VisitArrayGet()
6393 Location maybe_temp, in GenerateReferenceLoadOneRegister() argument
6406 maybe_temp, in GenerateReferenceLoadOneRegister()
6414 Register temp_reg = RegisterFrom(maybe_temp, type); in GenerateReferenceLoadOneRegister()
6418 codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset); in GenerateReferenceLoadOneRegister()
6433 Location maybe_temp, in GenerateReferenceLoadTwoRegisters() argument
6447 maybe_temp, in GenerateReferenceLoadTwoRegisters()
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Dcode_generator_arm_vixl.cc6041 Location maybe_temp = (locations->GetTempCount() != 0) ? locations->GetTemp(0) : Location(); in HandleFieldGet() local
6045 instruction, out, base, offset, maybe_temp, /* needs_null_check= */ true); in HandleFieldGet()
6505 Location maybe_temp = in VisitArrayGet() local
6512 maybe_temp, in VisitArrayGet()
8730 Location maybe_temp, in GenerateReferenceLoadOneRegister() argument
8735 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadOneRegister()
8740 instruction, out, out_reg, offset, maybe_temp, /* needs_null_check= */ false); in GenerateReferenceLoadOneRegister()
8746 __ Mov(RegisterFrom(maybe_temp), out_reg); in GenerateReferenceLoadOneRegister()
8749 codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset); in GenerateReferenceLoadOneRegister()
8764 Location maybe_temp, in GenerateReferenceLoadTwoRegisters() argument
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Dcode_generator_x86_64.h272 Location maybe_temp,
Dcode_generator_x86.h297 Location maybe_temp,
Dcode_generator_x86_64.cc7317 Location maybe_temp, in GenerateReferenceLoadOneRegister() argument
7332 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadOneRegister()
7333 __ movl(maybe_temp.AsRegister<CpuRegister>(), out_reg); in GenerateReferenceLoadOneRegister()
7336 codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset); in GenerateReferenceLoadOneRegister()
Dcode_generator_x86.cc8239 Location maybe_temp, in GenerateReferenceLoadOneRegister() argument
8254 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadOneRegister()
8255 __ movl(maybe_temp.AsRegister<Register>(), out_reg); in GenerateReferenceLoadOneRegister()
8258 codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset); in GenerateReferenceLoadOneRegister()