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Searched refs:op2_loc (Results 1 – 3 of 3) sorted by relevance

/art/compiler/optimizing/
Dcode_generator_arm_vixl.cc4736 Location op2_loc = locations->InAt(1); in GenerateMinMaxInt() local
4740 vixl32::Register op2 = RegisterFrom(op2_loc); in GenerateMinMaxInt()
4758 Location op2_loc = locations->InAt(1); in GenerateMinMaxLong() local
4762 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxLong()
4769 vixl32::Register op2_lo = LowRegisterFrom(op2_loc); in GenerateMinMaxLong()
4770 vixl32::Register op2_hi = HighRegisterFrom(op2_loc); in GenerateMinMaxLong()
4798 Location op2_loc = locations->InAt(1); in GenerateMinMaxFloat() local
4802 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxFloat()
4808 vixl32::SRegister op2 = SRegisterFrom(op2_loc); in GenerateMinMaxFloat()
4859 Location op2_loc = locations->InAt(1); in GenerateMinMaxDouble() local
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Dcode_generator_x86.cc4248 Location op2_loc = locations->InAt(1); in GenerateMinMaxInt() local
4251 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxInt()
4266 Register op2_lo = op2_loc.AsRegisterPairLow<Register>(); in GenerateMinMaxInt()
4267 Register op2_hi = op2_loc.AsRegisterPairHigh<Register>(); in GenerateMinMaxInt()
4286 Register op2 = op2_loc.AsRegister<Register>(); in GenerateMinMaxInt()
4304 Location op2_loc = locations->InAt(1); in GenerateMinMaxFP() local
4309 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxFP()
4331 XmmRegister op2 = op2_loc.AsFpuRegister<XmmRegister>(); in GenerateMinMaxFP()
Dcode_generator_x86_64.cc4285 Location op2_loc = locations->InAt(1); in GenerateMinMaxInt() local
4288 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxInt()
4297 CpuRegister op2 = op2_loc.AsRegister<CpuRegister>(); in GenerateMinMaxInt()
4319 Location op2_loc = locations->InAt(1); in GenerateMinMaxFP() local
4324 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxFP()
4346 XmmRegister op2 = op2_loc.AsFpuRegister<XmmRegister>(); in GenerateMinMaxFP()