1 /****************************************************************************** 2 * 3 * Copyright 2018-2021 NXP 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 19 #if (NXP_EXTNS == TRUE) 20 #include <stdint.h> 21 #else 22 #include <unistd.h> 23 #endif 24 #include <string> 25 #ifndef NXP_FEATURES_H 26 #define NXP_FEATURES_H 27 28 #define STRMAX_2 100 29 #define FW_MOBILE_MAJOR_NUMBER_PN553 0x01 30 #define FW_MOBILE_MAJOR_NUMBER_PN551 0x05 31 #define FW_MOBILE_MAJOR_NUMBER_PN48AD 0x01 32 #define FW_MOBILE_MAJOR_NUMBER_PN81A 0x02 33 #define FW_MOBILE_MAJOR_NUMBER_PN557 0x01 34 #define FW_MOBILE_MAJOR_NUMBER_SN100U 0x010 35 #define FW_MOBILE_MAJOR_NUMBER_SN220U 0x01 36 37 /*Including T4T NFCEE by incrementing 1*/ 38 #define NFA_EE_MAX_EE_SUPPORTED 5 39 40 #define JCOP_VER_3_1 1 41 #define JCOP_VER_3_2 2 42 #define JCOP_VER_3_3 3 43 #define JCOP_VER_4_0 4 44 #define JCOP_VER_5_0 5 45 #ifndef FW_LIB_ROOT_DIR 46 #define FW_LIB_ROOT_DIR "/vendor/lib64/" 47 #endif 48 #ifndef FW_BIN_ROOT_DIR 49 #define FW_BIN_ROOT_DIR "/vendor/firmware/" 50 #endif 51 #ifndef FW_LIB_EXTENSION 52 #define FW_LIB_EXTENSION ".so" 53 #endif 54 #ifndef FW_BIN_EXTENSION 55 #define FW_BIN_EXTENSION ".bin" 56 #endif 57 using namespace std; 58 typedef enum { 59 NFCC_DWNLD_WITH_VEN_RESET, 60 NFCC_DWNLD_WITH_NCI_CMD 61 } tNFCC_DnldType; 62 63 typedef enum { 64 DEFAULT_CHIP_TYPE = 0x00, 65 pn547C2 = 0x01, 66 pn65T, 67 pn548C2, 68 pn66T, 69 pn551, 70 pn67T, 71 pn553, 72 pn80T, 73 pn557, 74 pn81T, 75 sn100u, 76 sn220u 77 } tNFC_chipType; 78 79 typedef struct { 80 /*Flags common to all chip types*/ 81 uint8_t _NXP_NFCC_EMPTY_DATA_PACKET : 1; 82 uint8_t _GEMALTO_SE_SUPPORT : 1; 83 uint8_t _NFCC_I2C_READ_WRITE_IMPROVEMENT : 1; 84 uint8_t _NFCC_MIFARE_TIANJIN : 1; 85 uint8_t _NFCC_MW_RCVRY_BLK_FW_DNLD : 1; 86 uint8_t _NFC_NXP_STAT_DUAL_UICC_EXT_SWITCH : 1; 87 uint8_t _NFC_NXP_STAT_DUAL_UICC_WO_EXT_SWITCH : 1; 88 uint8_t _NFCC_FW_WA : 1; 89 uint8_t _NFCC_FORCE_NCI1_0_INIT : 1; 90 uint8_t _NFCC_ROUTING_BLOCK_BIT : 1; 91 uint8_t _NFCC_SPI_FW_DOWNLOAD_SYNC : 1; 92 uint8_t _HW_ANTENNA_LOOP4_SELF_TEST : 1; 93 uint8_t _NFCEE_REMOVED_NTF_RECOVERY : 1; 94 uint8_t _NFCC_FORCE_FW_DOWNLOAD : 1; 95 uint8_t _UICC_CREATE_CONNECTIVITY_PIPE : 1; 96 uint8_t _NFCC_AID_MATCHING_PLATFORM_CONFIG : 1; 97 uint8_t _NFCC_ROUTING_BLOCK_BIT_PROP : 1; 98 uint8_t _NXP_NFC_UICC_ETSI12 : 1; 99 uint8_t _NFA_EE_MAX_EE_SUPPORTED : 3; 100 uint8_t _NFCC_DWNLD_MODE : 1; 101 } tNfc_nfccFeatureList; 102 103 typedef struct { 104 uint8_t _ESE_EXCLUSIVE_WIRED_MODE : 2; 105 uint8_t _ESE_WIRED_MODE_RESUME : 2; 106 uint8_t _ESE_WIRED_MODE_TIMEOUT : 2; 107 uint8_t _ESE_UICC_DUAL_MODE : 2; 108 uint8_t _ESE_PN67T_RESET : 2; 109 uint8_t _ESE_APDU_GATE_RESET : 2; 110 uint8_t _ESE_WIRED_MODE_DISABLE_DISCOVERY : 1; 111 uint8_t _LEGACY_APDU_GATE : 1; 112 uint8_t _TRIPLE_MODE_PROTECTION : 1; 113 uint8_t _ESE_FELICA_CLT : 1; 114 uint8_t _WIRED_MODE_STANDBY_PROP : 1; 115 uint8_t _WIRED_MODE_STANDBY : 1; 116 uint8_t _ESE_DUAL_MODE_PRIO_SCHEME : 2; 117 uint8_t _ESE_FORCE_ENABLE : 1; 118 uint8_t _ESE_RESET_METHOD : 1; 119 uint8_t _EXCLUDE_NV_MEM_DEPENDENCY : 1; 120 uint8_t _ESE_ETSI_READER_ENABLE : 1; 121 uint8_t _ESE_SVDD_SYNC : 1; 122 uint8_t _NFCC_ESE_UICC_CONCURRENT_ACCESS_PROTECTION : 1; 123 uint8_t _ESE_JCOP_DWNLD_PROTECTION : 1; 124 uint8_t _UICC_HANDLE_CLEAR_ALL_PIPES : 1; 125 uint8_t _GP_CONTINUOUS_PROCESSING : 1; 126 uint8_t _ESE_DWP_SPI_SYNC_ENABLE : 1; 127 uint8_t _ESE_ETSI12_PROP_INIT : 1; 128 uint8_t _ESE_WIRED_MODE_PRIO : 1; 129 uint8_t _ESE_UICC_EXCLUSIVE_WIRED_MODE : 1; 130 uint8_t _ESE_POWER_MODE : 1; 131 uint8_t _ESE_P73_ISO_RST : 1; 132 uint8_t _BLOCK_PROPRIETARY_APDU_GATE : 1; 133 uint8_t _JCOP_WA_ENABLE : 1; 134 uint8_t _NXP_LDR_SVC_VER_2 : 1; 135 uint8_t _NXP_ESE_VER : 3; 136 uint8_t _NXP_ESE_JCOP_OSU_UAI_ENABLED : 1; 137 uint8_t _NCI_NFCEE_PWR_LINK_CMD : 1; 138 } tNfc_eseFeatureList; 139 typedef struct { 140 uint8_t _NFCC_RESET_RSP_LEN; 141 } tNfc_platformFeatureList; 142 143 typedef struct { 144 uint8_t _NCI_INTERFACE_UICC_DIRECT; 145 uint8_t _NCI_INTERFACE_ESE_DIRECT; 146 uint8_t _NCI_PWR_LINK_PARAM_CMD_SIZE; 147 uint8_t _NCI_EE_PWR_LINK_ALWAYS_ON; 148 uint8_t _NFA_EE_MAX_AID_ENTRIES; 149 uint8_t _NFC_NXP_AID_MAX_SIZE_DYN : 1; 150 } tNfc_nfcMwFeatureList; 151 152 typedef struct { 153 uint8_t nfcNxpEse : 1; 154 tNFC_chipType chipType; 155 std::string _FW_LIB_PATH; 156 std::string _PLATFORM_LIB_PATH; 157 std::string _PKU_LIB_PATH; 158 std::string _FW_BIN_PATH; 159 uint16_t _PHDNLDNFC_USERDATA_EEPROM_OFFSET; 160 uint16_t _PHDNLDNFC_USERDATA_EEPROM_LEN; 161 uint8_t _FW_MOBILE_MAJOR_NUMBER; 162 tNfc_nfccFeatureList nfccFL; 163 tNfc_eseFeatureList eseFL; 164 tNfc_platformFeatureList platformFL; 165 tNfc_nfcMwFeatureList nfcMwFL; 166 } tNfc_featureList; 167 168 extern tNfc_featureList nfcFL; 169 170 #define CONFIGURE_FEATURELIST(chipType) \ 171 { \ 172 nfcFL.chipType = chipType; \ 173 if (chipType == pn81T) { \ 174 nfcFL.chipType = pn557; \ 175 } else if (chipType == pn80T) { \ 176 nfcFL.chipType = pn553; \ 177 } else if (chipType == pn67T) { \ 178 nfcFL.chipType = pn551; \ 179 } else if (chipType == pn66T) { \ 180 nfcFL.chipType = pn548C2; \ 181 } else if (chipType == pn65T) { \ 182 nfcFL.chipType = pn547C2; \ 183 } \ 184 if ((chipType == pn65T) || (chipType == pn66T) || (chipType == pn67T) || \ 185 (chipType == pn80T) || (chipType == pn81T) || (chipType == sn100u) || \ 186 (chipType == sn220u)) { \ 187 nfcFL.nfcNxpEse = true; \ 188 CONFIGURE_FEATURELIST_NFCC_WITH_ESE(chipType) \ 189 } else { \ 190 nfcFL.nfcNxpEse = false; \ 191 CONFIGURE_FEATURELIST_NFCC(chipType) \ 192 } \ 193 } 194 195 #define CONFIGURE_FEATURELIST_NFCC_WITH_ESE(chipType) \ 196 { \ 197 nfcFL.nfccFL._NXP_NFCC_EMPTY_DATA_PACKET = true; \ 198 nfcFL.nfccFL._GEMALTO_SE_SUPPORT = true; \ 199 \ 200 nfcFL.eseFL._ESE_EXCLUSIVE_WIRED_MODE = 1; \ 201 nfcFL.eseFL._ESE_WIRED_MODE_RESUME = 2; \ 202 nfcFL.eseFL._ESE_PN67T_RESET = 1; \ 203 nfcFL.eseFL._ESE_APDU_GATE_RESET = 2; \ 204 nfcFL.eseFL._NXP_ESE_VER = JCOP_VER_4_0; \ 205 nfcFL.eseFL._NXP_LDR_SVC_VER_2 = true; \ 206 nfcFL.eseFL._NXP_ESE_JCOP_OSU_UAI_ENABLED = false; \ 207 \ 208 nfcFL.eseFL._NCI_NFCEE_PWR_LINK_CMD = false; \ 209 nfcFL.nfcMwFL._NFC_NXP_AID_MAX_SIZE_DYN = true; \ 210 if (chipType == sn100u) { \ 211 CONFIGURE_FEATURELIST_NFCC(sn100u) \ 212 nfcFL.nfccFL._NFCC_SPI_FW_DOWNLOAD_SYNC = true; \ 213 nfcFL.nfccFL._NFA_EE_MAX_EE_SUPPORTED = 5; \ 214 \ 215 nfcFL.eseFL._NCI_NFCEE_PWR_LINK_CMD = true; \ 216 nfcFL.eseFL._NXP_ESE_JCOP_OSU_UAI_ENABLED = true; \ 217 nfcFL.eseFL._ESE_FELICA_CLT = true; \ 218 nfcFL.eseFL._ESE_DUAL_MODE_PRIO_SCHEME = \ 219 nfcFL.eseFL._ESE_UICC_DUAL_MODE; \ 220 nfcFL.eseFL._ESE_RESET_METHOD = true; \ 221 nfcFL.eseFL._ESE_POWER_MODE = false; \ 222 nfcFL.eseFL._ESE_P73_ISO_RST = true; \ 223 nfcFL.eseFL._WIRED_MODE_STANDBY = false; \ 224 nfcFL.eseFL._ESE_ETSI_READER_ENABLE = true; \ 225 nfcFL.eseFL._ESE_SVDD_SYNC = false; \ 226 nfcFL.eseFL._ESE_JCOP_DWNLD_PROTECTION = true; \ 227 nfcFL.eseFL._UICC_HANDLE_CLEAR_ALL_PIPES = true; \ 228 nfcFL.eseFL._GP_CONTINUOUS_PROCESSING = false; \ 229 nfcFL.eseFL._ESE_DWP_SPI_SYNC_ENABLE = false; \ 230 nfcFL.eseFL._ESE_ETSI12_PROP_INIT = false; \ 231 nfcFL.eseFL._BLOCK_PROPRIETARY_APDU_GATE = false; \ 232 nfcFL.eseFL._LEGACY_APDU_GATE = true; \ 233 } \ 234 if (chipType == sn220u) { \ 235 CONFIGURE_FEATURELIST_NFCC(sn220u) \ 236 nfcFL.nfccFL._NFCC_SPI_FW_DOWNLOAD_SYNC = true; \ 237 nfcFL.nfccFL._NFA_EE_MAX_EE_SUPPORTED = 4; \ 238 \ 239 nfcFL.eseFL._NCI_NFCEE_PWR_LINK_CMD = true; \ 240 nfcFL.eseFL._NXP_ESE_JCOP_OSU_UAI_ENABLED = true; \ 241 nfcFL.eseFL._ESE_FELICA_CLT = true; \ 242 nfcFL.eseFL._ESE_DUAL_MODE_PRIO_SCHEME = \ 243 nfcFL.eseFL._ESE_UICC_DUAL_MODE; \ 244 nfcFL.eseFL._ESE_RESET_METHOD = true; \ 245 nfcFL.eseFL._ESE_POWER_MODE = false; \ 246 nfcFL.eseFL._ESE_P73_ISO_RST = true; \ 247 nfcFL.eseFL._WIRED_MODE_STANDBY = false; \ 248 nfcFL.eseFL._ESE_ETSI_READER_ENABLE = true; \ 249 nfcFL.eseFL._ESE_SVDD_SYNC = false; \ 250 nfcFL.eseFL._ESE_JCOP_DWNLD_PROTECTION = true; \ 251 nfcFL.eseFL._UICC_HANDLE_CLEAR_ALL_PIPES = true; \ 252 nfcFL.eseFL._GP_CONTINUOUS_PROCESSING = false; \ 253 nfcFL.eseFL._ESE_DWP_SPI_SYNC_ENABLE = false; \ 254 nfcFL.eseFL._ESE_ETSI12_PROP_INIT = false; \ 255 nfcFL.eseFL._BLOCK_PROPRIETARY_APDU_GATE = false; \ 256 nfcFL.eseFL._LEGACY_APDU_GATE = true; \ 257 } \ 258 if (chipType == pn81T) { \ 259 CONFIGURE_FEATURELIST_NFCC(pn557) \ 260 nfcFL.nfccFL._NFCC_SPI_FW_DOWNLOAD_SYNC = true; \ 261 nfcFL.nfccFL._NFA_EE_MAX_EE_SUPPORTED = 4; \ 262 \ 263 nfcFL.eseFL._ESE_FELICA_CLT = true; \ 264 nfcFL.eseFL._ESE_DUAL_MODE_PRIO_SCHEME = \ 265 nfcFL.eseFL._ESE_WIRED_MODE_RESUME; \ 266 nfcFL.eseFL._ESE_RESET_METHOD = true; \ 267 nfcFL.eseFL._ESE_POWER_MODE = true; \ 268 nfcFL.eseFL._ESE_P73_ISO_RST = true; \ 269 nfcFL.eseFL._WIRED_MODE_STANDBY = true; \ 270 nfcFL.eseFL._ESE_ETSI_READER_ENABLE = true; \ 271 nfcFL.eseFL._ESE_SVDD_SYNC = true; \ 272 nfcFL.eseFL._ESE_JCOP_DWNLD_PROTECTION = true; \ 273 nfcFL.eseFL._UICC_HANDLE_CLEAR_ALL_PIPES = true; \ 274 nfcFL.eseFL._GP_CONTINUOUS_PROCESSING = false; \ 275 nfcFL.eseFL._ESE_DWP_SPI_SYNC_ENABLE = true; \ 276 nfcFL.eseFL._ESE_ETSI12_PROP_INIT = true; \ 277 } \ 278 if (chipType == pn80T) { \ 279 CONFIGURE_FEATURELIST_NFCC(pn553) \ 280 nfcFL.nfccFL._NFA_EE_MAX_EE_SUPPORTED = 4; \ 281 \ 282 nfcFL.eseFL._ESE_FELICA_CLT = true; \ 283 nfcFL.eseFL._WIRED_MODE_STANDBY = true; \ 284 nfcFL.eseFL._ESE_DUAL_MODE_PRIO_SCHEME = \ 285 nfcFL.eseFL._ESE_WIRED_MODE_RESUME; \ 286 nfcFL.eseFL._ESE_RESET_METHOD = true; \ 287 nfcFL.eseFL._ESE_ETSI_READER_ENABLE = true; \ 288 nfcFL.eseFL._ESE_SVDD_SYNC = true; \ 289 nfcFL.eseFL._ESE_JCOP_DWNLD_PROTECTION = true; \ 290 nfcFL.eseFL._UICC_HANDLE_CLEAR_ALL_PIPES = true; \ 291 nfcFL.eseFL._ESE_DWP_SPI_SYNC_ENABLE = true; \ 292 nfcFL.eseFL._ESE_POWER_MODE = true; \ 293 nfcFL.eseFL._ESE_P73_ISO_RST = true; \ 294 \ 295 nfcFL.nfcMwFL._NCI_PWR_LINK_PARAM_CMD_SIZE = 0x02; \ 296 nfcFL.nfcMwFL._NCI_EE_PWR_LINK_ALWAYS_ON = 0x01; \ 297 } else if (chipType == pn67T) { \ 298 CONFIGURE_FEATURELIST_NFCC(pn551) \ 299 nfcFL.nfccFL._NFA_EE_MAX_EE_SUPPORTED = 3; \ 300 \ 301 nfcFL.eseFL._TRIPLE_MODE_PROTECTION = true; \ 302 nfcFL.eseFL._WIRED_MODE_STANDBY_PROP = true; \ 303 nfcFL.eseFL._ESE_FORCE_ENABLE = true; \ 304 nfcFL.eseFL._ESE_ETSI_READER_ENABLE = true; \ 305 nfcFL.eseFL._ESE_SVDD_SYNC = true; \ 306 nfcFL.eseFL._LEGACY_APDU_GATE = true; \ 307 nfcFL.eseFL._NFCC_ESE_UICC_CONCURRENT_ACCESS_PROTECTION = true; \ 308 nfcFL.eseFL._ESE_DWP_SPI_SYNC_ENABLE = true; \ 309 nfcFL.eseFL._NXP_ESE_VER = JCOP_VER_3_3; \ 310 } else if (chipType == pn66T) { \ 311 CONFIGURE_FEATURELIST_NFCC(pn548C2) \ 312 nfcFL.nfccFL._NFA_EE_MAX_EE_SUPPORTED = 3; \ 313 \ 314 nfcFL.eseFL._TRIPLE_MODE_PROTECTION = true; \ 315 nfcFL.eseFL._WIRED_MODE_STANDBY_PROP = true; \ 316 nfcFL.eseFL._ESE_FORCE_ENABLE = true; \ 317 nfcFL.eseFL._ESE_ETSI_READER_ENABLE = true; \ 318 nfcFL.eseFL._ESE_SVDD_SYNC = true; \ 319 nfcFL.eseFL._LEGACY_APDU_GATE = true; \ 320 nfcFL.eseFL._NFCC_ESE_UICC_CONCURRENT_ACCESS_PROTECTION = true; \ 321 nfcFL.eseFL._ESE_DWP_SPI_SYNC_ENABLE = true; \ 322 nfcFL.eseFL._NXP_ESE_VER = JCOP_VER_3_3; \ 323 } else if (chipType == pn65T) { \ 324 CONFIGURE_FEATURELIST_NFCC(pn547C2) \ 325 nfcFL.nfccFL._NFA_EE_MAX_EE_SUPPORTED = 3; \ 326 nfcFL.eseFL._ESE_WIRED_MODE_DISABLE_DISCOVERY = true; \ 327 nfcFL.eseFL._LEGACY_APDU_GATE = true; \ 328 } \ 329 } 330 331 #define CONFIGURE_FEATURELIST_NFCC(chipType) \ 332 { \ 333 nfcFL.eseFL._ESE_WIRED_MODE_TIMEOUT = 3; \ 334 nfcFL.eseFL._ESE_UICC_DUAL_MODE = 0; \ 335 nfcFL.eseFL._ESE_WIRED_MODE_DISABLE_DISCOVERY = false; \ 336 nfcFL.eseFL._LEGACY_APDU_GATE = false; \ 337 nfcFL.eseFL._TRIPLE_MODE_PROTECTION = false; \ 338 nfcFL.eseFL._ESE_FELICA_CLT = false; \ 339 nfcFL.eseFL._WIRED_MODE_STANDBY_PROP = false; \ 340 nfcFL.eseFL._WIRED_MODE_STANDBY = false; \ 341 nfcFL.eseFL._ESE_DUAL_MODE_PRIO_SCHEME = \ 342 nfcFL.eseFL._ESE_WIRED_MODE_TIMEOUT; \ 343 nfcFL.eseFL._ESE_FORCE_ENABLE = false; \ 344 nfcFL.eseFL._ESE_RESET_METHOD = false; \ 345 nfcFL.eseFL._ESE_ETSI_READER_ENABLE = false; \ 346 nfcFL.eseFL._ESE_SVDD_SYNC = false; \ 347 nfcFL.eseFL._NFCC_ESE_UICC_CONCURRENT_ACCESS_PROTECTION = false; \ 348 nfcFL.eseFL._ESE_JCOP_DWNLD_PROTECTION = false; \ 349 nfcFL.eseFL._UICC_HANDLE_CLEAR_ALL_PIPES = false; \ 350 nfcFL.eseFL._GP_CONTINUOUS_PROCESSING = false; \ 351 nfcFL.eseFL._ESE_DWP_SPI_SYNC_ENABLE = false; \ 352 nfcFL.eseFL._ESE_ETSI12_PROP_INIT = false; \ 353 nfcFL.eseFL._ESE_WIRED_MODE_PRIO = false; \ 354 nfcFL.eseFL._ESE_UICC_EXCLUSIVE_WIRED_MODE = false; \ 355 nfcFL.eseFL._ESE_POWER_MODE = false; \ 356 nfcFL.eseFL._ESE_P73_ISO_RST = false; \ 357 nfcFL.eseFL._BLOCK_PROPRIETARY_APDU_GATE = false; \ 358 nfcFL.eseFL._JCOP_WA_ENABLE = true; \ 359 nfcFL.eseFL._EXCLUDE_NV_MEM_DEPENDENCY = false; \ 360 nfcFL.nfccFL._NXP_NFC_UICC_ETSI12 = false; \ 361 nfcFL.nfccFL._NFCC_SPI_FW_DOWNLOAD_SYNC = false; \ 362 \ 363 nfcFL.platformFL._NFCC_RESET_RSP_LEN = 0; \ 364 \ 365 nfcFL.nfcMwFL._NCI_INTERFACE_UICC_DIRECT = 0x00; \ 366 nfcFL.nfcMwFL._NCI_INTERFACE_ESE_DIRECT = 0x00; \ 367 nfcFL.nfcMwFL._NCI_PWR_LINK_PARAM_CMD_SIZE = 0x02; \ 368 nfcFL.nfcMwFL._NCI_EE_PWR_LINK_ALWAYS_ON = 0x01; \ 369 nfcFL._PHDNLDNFC_USERDATA_EEPROM_OFFSET = 0x023CU; \ 370 nfcFL._PHDNLDNFC_USERDATA_EEPROM_LEN = 0x0C80U; \ 371 nfcFL._FW_MOBILE_MAJOR_NUMBER = FW_MOBILE_MAJOR_NUMBER_PN48AD; \ 372 nfcFL.nfccFL._NFCC_DWNLD_MODE = NFCC_DWNLD_WITH_VEN_RESET; \ 373 \ 374 if (chipType == sn220u) { \ 375 nfcFL.nfccFL._NFCC_DWNLD_MODE = NFCC_DWNLD_WITH_NCI_CMD; \ 376 nfcFL.nfccFL._NFCC_I2C_READ_WRITE_IMPROVEMENT = true; \ 377 nfcFL.nfccFL._NFCC_MIFARE_TIANJIN = false; \ 378 nfcFL.nfccFL._NFCC_MW_RCVRY_BLK_FW_DNLD = true; \ 379 nfcFL.nfccFL._NFC_NXP_STAT_DUAL_UICC_EXT_SWITCH = false; \ 380 nfcFL.nfccFL._NFC_NXP_STAT_DUAL_UICC_WO_EXT_SWITCH = false; \ 381 nfcFL.nfccFL._NFCC_FW_WA = true; \ 382 nfcFL.nfccFL._NFCC_FORCE_NCI1_0_INIT = false; \ 383 nfcFL.nfccFL._NFCC_SPI_FW_DOWNLOAD_SYNC = true; \ 384 nfcFL.nfccFL._HW_ANTENNA_LOOP4_SELF_TEST = false; \ 385 nfcFL.nfccFL._NFCEE_REMOVED_NTF_RECOVERY = true; \ 386 nfcFL.nfccFL._NFCC_FORCE_FW_DOWNLOAD = true; \ 387 nfcFL.nfccFL._UICC_CREATE_CONNECTIVITY_PIPE = true; \ 388 nfcFL.nfccFL._NXP_NFC_UICC_ETSI12 = false; \ 389 nfcFL.nfccFL._NFA_EE_MAX_EE_SUPPORTED = 3; \ 390 nfcFL.nfccFL._NFCC_ROUTING_BLOCK_BIT_PROP = false; \ 391 nfcFL.nfccFL._NFCC_AID_MATCHING_PLATFORM_CONFIG = false; \ 392 \ 393 nfcFL.eseFL._ESE_ETSI12_PROP_INIT = true; \ 394 nfcFL.eseFL._EXCLUDE_NV_MEM_DEPENDENCY = true; \ 395 \ 396 nfcFL.platformFL._NFCC_RESET_RSP_LEN = 0x10U; \ 397 \ 398 nfcFL.nfcMwFL._NCI_INTERFACE_UICC_DIRECT = 0x82; \ 399 nfcFL.nfcMwFL._NCI_INTERFACE_ESE_DIRECT = 0x83; \ 400 nfcFL._FW_MOBILE_MAJOR_NUMBER = FW_MOBILE_MAJOR_NUMBER_SN220U; \ 401 SRTCPY_FW("libsn220u_fw", "libsn220u_fw_platform", "libsn220u_fw_pku") \ 402 STRCPY_FW_BIN("sn220u") \ 403 } \ 404 if (chipType == sn100u) { \ 405 nfcFL.nfccFL._NFCC_DWNLD_MODE = NFCC_DWNLD_WITH_NCI_CMD; \ 406 nfcFL.nfccFL._NFCC_I2C_READ_WRITE_IMPROVEMENT = true; \ 407 nfcFL.nfccFL._NFCC_MIFARE_TIANJIN = false; \ 408 nfcFL.nfccFL._NFCC_MW_RCVRY_BLK_FW_DNLD = true; \ 409 nfcFL.nfccFL._NFC_NXP_STAT_DUAL_UICC_EXT_SWITCH = false; \ 410 nfcFL.nfccFL._NFC_NXP_STAT_DUAL_UICC_WO_EXT_SWITCH = false; \ 411 nfcFL.nfccFL._NFCC_FW_WA = true; \ 412 nfcFL.nfccFL._NFCC_FORCE_NCI1_0_INIT = false; \ 413 nfcFL.nfccFL._NFCC_SPI_FW_DOWNLOAD_SYNC = true; \ 414 nfcFL.nfccFL._HW_ANTENNA_LOOP4_SELF_TEST = false; \ 415 nfcFL.nfccFL._NFCEE_REMOVED_NTF_RECOVERY = true; \ 416 nfcFL.nfccFL._NFCC_FORCE_FW_DOWNLOAD = true; \ 417 nfcFL.nfccFL._UICC_CREATE_CONNECTIVITY_PIPE = true; \ 418 nfcFL.nfccFL._NXP_NFC_UICC_ETSI12 = false; \ 419 nfcFL.nfccFL._NFA_EE_MAX_EE_SUPPORTED = 3; \ 420 nfcFL.nfccFL._NFCC_ROUTING_BLOCK_BIT_PROP = false; \ 421 nfcFL.nfccFL._NFCC_AID_MATCHING_PLATFORM_CONFIG = false; \ 422 \ 423 nfcFL.eseFL._ESE_ETSI12_PROP_INIT = true; \ 424 nfcFL.eseFL._EXCLUDE_NV_MEM_DEPENDENCY = true; \ 425 \ 426 nfcFL.platformFL._NFCC_RESET_RSP_LEN = 0x10U; \ 427 \ 428 nfcFL.nfcMwFL._NCI_INTERFACE_UICC_DIRECT = 0x82; \ 429 nfcFL.nfcMwFL._NCI_INTERFACE_ESE_DIRECT = 0x83; \ 430 nfcFL._FW_MOBILE_MAJOR_NUMBER = FW_MOBILE_MAJOR_NUMBER_SN100U; \ 431 SRTCPY_FW("libsn100u_fw", "libsn100u_fw_platform", "libsn100u_fw_pku") \ 432 STRCPY_FW_BIN("sn100u") \ 433 } \ 434 if (chipType == pn557) { \ 435 nfcFL.nfccFL._NFCC_I2C_READ_WRITE_IMPROVEMENT = true; \ 436 nfcFL.nfccFL._NFCC_MIFARE_TIANJIN = false; \ 437 nfcFL.nfccFL._NFCC_MW_RCVRY_BLK_FW_DNLD = true; \ 438 nfcFL.nfccFL._NFC_NXP_STAT_DUAL_UICC_EXT_SWITCH = false; \ 439 nfcFL.nfccFL._NFC_NXP_STAT_DUAL_UICC_WO_EXT_SWITCH = true; \ 440 nfcFL.nfccFL._NFCC_FW_WA = true; \ 441 nfcFL.nfccFL._NFCC_FORCE_NCI1_0_INIT = false; \ 442 nfcFL.nfccFL._NFCC_SPI_FW_DOWNLOAD_SYNC = true; \ 443 nfcFL.nfccFL._HW_ANTENNA_LOOP4_SELF_TEST = false; \ 444 nfcFL.nfccFL._NFCEE_REMOVED_NTF_RECOVERY = true; \ 445 nfcFL.nfccFL._NFCC_FORCE_FW_DOWNLOAD = true; \ 446 nfcFL.nfccFL._UICC_CREATE_CONNECTIVITY_PIPE = true; \ 447 nfcFL.nfccFL._NXP_NFC_UICC_ETSI12 = false; \ 448 nfcFL.nfccFL._NFA_EE_MAX_EE_SUPPORTED = 3; \ 449 \ 450 nfcFL.eseFL._ESE_ETSI12_PROP_INIT = true; \ 451 nfcFL.eseFL._EXCLUDE_NV_MEM_DEPENDENCY = true; \ 452 \ 453 nfcFL.platformFL._NFCC_RESET_RSP_LEN = 0x10U; \ 454 \ 455 nfcFL.nfcMwFL._NCI_INTERFACE_UICC_DIRECT = 0x82; \ 456 nfcFL.nfcMwFL._NCI_INTERFACE_ESE_DIRECT = 0x83; \ 457 \ 458 SRTCPY_FW("libpn557_fw", "libpn557_fw_platform", "libpn557_fw_pku") \ 459 STRCPY_FW_BIN("pn557") \ 460 } else if (chipType == pn553) { \ 461 nfcFL.nfccFL._NFCC_I2C_READ_WRITE_IMPROVEMENT = true; \ 462 nfcFL.nfccFL._NFCC_MIFARE_TIANJIN = false; \ 463 nfcFL.nfccFL._NFCC_MW_RCVRY_BLK_FW_DNLD = true; \ 464 nfcFL.nfccFL._NFC_NXP_STAT_DUAL_UICC_EXT_SWITCH = true; \ 465 nfcFL.nfccFL._NFC_NXP_STAT_DUAL_UICC_WO_EXT_SWITCH = true; \ 466 nfcFL.nfccFL._NFCC_FW_WA = true; \ 467 nfcFL.nfccFL._NFCC_FORCE_NCI1_0_INIT = true; \ 468 nfcFL.nfccFL._NFCC_ROUTING_BLOCK_BIT = true; \ 469 nfcFL.nfccFL._NFCC_SPI_FW_DOWNLOAD_SYNC = true; \ 470 nfcFL.nfccFL._HW_ANTENNA_LOOP4_SELF_TEST = false; \ 471 nfcFL.nfccFL._NFCEE_REMOVED_NTF_RECOVERY = true; \ 472 nfcFL.nfccFL._NFCC_FORCE_FW_DOWNLOAD = true; \ 473 nfcFL.nfccFL._UICC_CREATE_CONNECTIVITY_PIPE = true; \ 474 nfcFL.nfccFL._NFCC_AID_MATCHING_PLATFORM_CONFIG = false; \ 475 nfcFL.nfccFL._NFCC_ROUTING_BLOCK_BIT_PROP = false; \ 476 nfcFL.nfccFL._NFA_EE_MAX_EE_SUPPORTED = 3; \ 477 \ 478 nfcFL.eseFL._ESE_ETSI12_PROP_INIT = true; \ 479 nfcFL.eseFL._JCOP_WA_ENABLE = false; \ 480 nfcFL.eseFL._EXCLUDE_NV_MEM_DEPENDENCY = true; \ 481 \ 482 nfcFL.platformFL._NFCC_RESET_RSP_LEN = 0x10U; \ 483 \ 484 nfcFL.nfcMwFL._NCI_INTERFACE_UICC_DIRECT = 0x82; \ 485 nfcFL.nfcMwFL._NCI_INTERFACE_ESE_DIRECT = 0x83; \ 486 \ 487 SRTCPY_FW("libpn553tc_fw", "libpn553tc_fw_platform", \ 488 "libpn553tc_fw_pku") \ 489 STRCPY_FW_BIN("pn553") \ 490 nfcFL._FW_MOBILE_MAJOR_NUMBER = FW_MOBILE_MAJOR_NUMBER_PN553; \ 491 \ 492 } else if (chipType == pn551) { \ 493 nfcFL.nfccFL._NFCC_I2C_READ_WRITE_IMPROVEMENT = true; \ 494 nfcFL.nfccFL._NFCC_MIFARE_TIANJIN = true; \ 495 nfcFL.nfccFL._NFCC_MW_RCVRY_BLK_FW_DNLD = false; \ 496 nfcFL.nfccFL._NFC_NXP_STAT_DUAL_UICC_EXT_SWITCH = true; \ 497 nfcFL.nfccFL._NFC_NXP_STAT_DUAL_UICC_WO_EXT_SWITCH = false; \ 498 nfcFL.nfccFL._NFCC_FW_WA = false; \ 499 nfcFL.nfccFL._NFCC_FORCE_NCI1_0_INIT = false; \ 500 nfcFL.nfccFL._NFCC_ROUTING_BLOCK_BIT = false; \ 501 nfcFL.nfccFL._NFCC_SPI_FW_DOWNLOAD_SYNC = false; \ 502 nfcFL.nfccFL._HW_ANTENNA_LOOP4_SELF_TEST = true; \ 503 nfcFL.nfccFL._NFCEE_REMOVED_NTF_RECOVERY = true; \ 504 nfcFL.nfccFL._NFCC_FORCE_FW_DOWNLOAD = false; \ 505 nfcFL.nfccFL._UICC_CREATE_CONNECTIVITY_PIPE = false; \ 506 nfcFL.nfccFL._NFCC_AID_MATCHING_PLATFORM_CONFIG = true; \ 507 nfcFL.nfccFL._NFCC_ROUTING_BLOCK_BIT_PROP = true; \ 508 nfcFL.nfccFL._NFA_EE_MAX_EE_SUPPORTED = 2; \ 509 \ 510 nfcFL.eseFL._ESE_FORCE_ENABLE = true; \ 511 \ 512 nfcFL.platformFL._NFCC_RESET_RSP_LEN = 0x11U; \ 513 \ 514 nfcFL.nfcMwFL._NCI_INTERFACE_UICC_DIRECT = 0x82; \ 515 nfcFL.nfcMwFL._NCI_INTERFACE_ESE_DIRECT = 0x83; \ 516 \ 517 SRTCPY_FW("libpn551_fw", "libpn551_fw_platform", "libpn551_fw_pku") \ 518 \ 519 STRCPY_FW_BIN("pn551") \ 520 nfcFL._PHDNLDNFC_USERDATA_EEPROM_OFFSET = 0x02BCU; \ 521 nfcFL._PHDNLDNFC_USERDATA_EEPROM_LEN = 0x0C00U; \ 522 nfcFL._FW_MOBILE_MAJOR_NUMBER = FW_MOBILE_MAJOR_NUMBER_PN551; \ 523 \ 524 } else if (chipType == pn548C2) { \ 525 nfcFL.nfccFL._NFCC_I2C_READ_WRITE_IMPROVEMENT = true; \ 526 nfcFL.nfccFL._NFCC_MIFARE_TIANJIN = true; \ 527 nfcFL.nfccFL._NFCC_MW_RCVRY_BLK_FW_DNLD = false; \ 528 nfcFL.nfccFL._NFC_NXP_STAT_DUAL_UICC_EXT_SWITCH = true; \ 529 nfcFL.nfccFL._NFC_NXP_STAT_DUAL_UICC_WO_EXT_SWITCH = false; \ 530 nfcFL.nfccFL._NFCC_FW_WA = false; \ 531 nfcFL.nfccFL._NFCC_FORCE_NCI1_0_INIT = false; \ 532 nfcFL.nfccFL._NFCC_ROUTING_BLOCK_BIT = false; \ 533 nfcFL.nfccFL._NFCC_SPI_FW_DOWNLOAD_SYNC = false; \ 534 nfcFL.nfccFL._HW_ANTENNA_LOOP4_SELF_TEST = true; \ 535 nfcFL.nfccFL._NFCEE_REMOVED_NTF_RECOVERY = true; \ 536 nfcFL.nfccFL._NFCC_FORCE_FW_DOWNLOAD = false; \ 537 nfcFL.nfccFL._UICC_CREATE_CONNECTIVITY_PIPE = false; \ 538 nfcFL.nfccFL._NFCC_AID_MATCHING_PLATFORM_CONFIG = true; \ 539 nfcFL.nfccFL._NFCC_ROUTING_BLOCK_BIT_PROP = true; \ 540 nfcFL.nfccFL._NFA_EE_MAX_EE_SUPPORTED = 2; \ 541 \ 542 nfcFL.eseFL._ESE_FORCE_ENABLE = true; \ 543 \ 544 nfcFL.nfcMwFL._NCI_INTERFACE_UICC_DIRECT = 0x82; \ 545 nfcFL.nfcMwFL._NCI_INTERFACE_ESE_DIRECT = 0x83; \ 546 \ 547 SRTCPY_FW("libpn548ad_fw", "libpn548ad_fw_platform", \ 548 "libpn548ad_fw_pku") \ 549 \ 550 nfcFL._PHDNLDNFC_USERDATA_EEPROM_OFFSET = 0x02BCU; \ 551 nfcFL._PHDNLDNFC_USERDATA_EEPROM_LEN = 0x0C00U; \ 552 \ 553 } else if (chipType == pn547C2) { \ 554 nfcFL.nfccFL._NFCC_I2C_READ_WRITE_IMPROVEMENT = false; \ 555 nfcFL.nfccFL._NFCC_MIFARE_TIANJIN = true; \ 556 nfcFL.nfccFL._NFCC_MW_RCVRY_BLK_FW_DNLD = false; \ 557 nfcFL.nfccFL._NFC_NXP_STAT_DUAL_UICC_EXT_SWITCH = false; \ 558 nfcFL.nfccFL._NFC_NXP_STAT_DUAL_UICC_WO_EXT_SWITCH = false; \ 559 nfcFL.nfccFL._NFCC_FW_WA = false; \ 560 nfcFL.nfccFL._NFCC_FORCE_NCI1_0_INIT = false; \ 561 nfcFL.nfccFL._NFCC_ROUTING_BLOCK_BIT = false; \ 562 nfcFL.nfccFL._NFCC_SPI_FW_DOWNLOAD_SYNC = false; \ 563 nfcFL.nfccFL._HW_ANTENNA_LOOP4_SELF_TEST = true; \ 564 nfcFL.nfccFL._NFCEE_REMOVED_NTF_RECOVERY = true; \ 565 nfcFL.nfccFL._NFCC_FORCE_FW_DOWNLOAD = false; \ 566 nfcFL.nfccFL._UICC_CREATE_CONNECTIVITY_PIPE = false; \ 567 nfcFL.nfccFL._NFCC_AID_MATCHING_PLATFORM_CONFIG = true; \ 568 nfcFL.nfccFL._NFCC_ROUTING_BLOCK_BIT_PROP = false; \ 569 nfcFL.nfccFL._NFA_EE_MAX_EE_SUPPORTED = 2; \ 570 \ 571 nfcFL.nfcMwFL._NCI_INTERFACE_UICC_DIRECT = 0x81; \ 572 nfcFL.nfcMwFL._NCI_INTERFACE_ESE_DIRECT = 0x82; \ 573 \ 574 SRTCPY_FW("libpn547_fw", "libpn547_fw_platform", "libpn547_fw_pku") \ 575 \ 576 } else if (chipType == DEFAULT_CHIP_TYPE) { \ 577 nfcFL.nfccFL._NFCC_FORCE_FW_DOWNLOAD = true; \ 578 } \ 579 } 580 #define STRCPY_FW_LIB(str) \ 581 { \ 582 nfcFL._FW_LIB_PATH.clear(); \ 583 nfcFL._FW_LIB_PATH.append(FW_LIB_ROOT_DIR); \ 584 nfcFL._FW_LIB_PATH.append(str); \ 585 nfcFL._FW_LIB_PATH.append(FW_LIB_EXTENSION); \ 586 } 587 #define STRCPY_FW_BIN(str) \ 588 { \ 589 nfcFL._FW_BIN_PATH.clear(); \ 590 nfcFL._FW_BIN_PATH.append(FW_BIN_ROOT_DIR); \ 591 nfcFL._FW_BIN_PATH.append(str); \ 592 nfcFL._FW_BIN_PATH.append(FW_BIN_EXTENSION); \ 593 } 594 #define SRTCPY_FW(str1, str2, str3) \ 595 { \ 596 nfcFL._FW_LIB_PATH.clear(); \ 597 nfcFL._FW_LIB_PATH.append(FW_LIB_ROOT_DIR); \ 598 nfcFL._FW_LIB_PATH.append(str1); \ 599 nfcFL._FW_LIB_PATH.append(FW_LIB_EXTENSION); \ 600 nfcFL._PLATFORM_LIB_PATH.clear(); \ 601 nfcFL._PLATFORM_LIB_PATH.append(FW_LIB_ROOT_DIR); \ 602 nfcFL._PLATFORM_LIB_PATH.append(str2); \ 603 nfcFL._PLATFORM_LIB_PATH.append(FW_LIB_EXTENSION); \ 604 nfcFL._PKU_LIB_PATH.clear(); \ 605 nfcFL._PKU_LIB_PATH.append(FW_LIB_ROOT_DIR); \ 606 nfcFL._PKU_LIB_PATH.append(str3); \ 607 nfcFL._PKU_LIB_PATH.append(FW_LIB_EXTENSION); \ 608 } 609 #endif 610