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Searched refs:cam_wr (Results 1 – 3 of 3) sorted by relevance

/hardware/google/gchips/gralloc4/src/core/
Dformat_info.cpp129 …, .dpu_wr = F_NONE, .dpu_aeu_wr = F_AFBC, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_NONE, },
130 …, .dpu_wr = F_LIN, .dpu_aeu_wr = F_AFBC, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_NONE, },
131 …, .dpu_wr = F_LIN, .dpu_aeu_wr = F_AFBC, .vpu_rd = F_LIN, .vpu_wr = F_NONE, .cam_wr = F_LIN, },
132 … .dpu_wr = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_rd = F_LIN, .vpu_wr = F_NONE, .cam_wr = F_NONE, },
133 …, .dpu_wr = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_NONE, },
134 …, .dpu_wr = F_LIN, .dpu_aeu_wr = F_AFBC, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_NONE, },
135 … .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_NONE, },
136 … .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_LIN, },
137 … .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr = F_NONE, },
139 … .dpu_wr = F_NONE, .dpu_aeu_wr = F_AFBC, .vpu_rd = F_AFBC, .vpu_wr = F_AFBC, .cam_wr = F_NONE, },
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Dformat_info.h101 format_support_flags cam_wr; /* Camera producer. */ member
Dmali_gralloc_formats.cpp474 support &= format->cam_wr; in ip_supports_base_format()