1 /* 2 * Copyright (C) 2010-2021 NXP 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 #ifndef _PHNXPNCIHAL_H_ 17 #define _PHNXPNCIHAL_H_ 18 19 #include <hardware/nfc.h> 20 #include <phNxpNciHal_utils.h> 21 #include "NxpMfcReader.h" 22 #include "NxpNfcCapability.h" 23 #ifdef NXP_BOOTTIME_UPDATE 24 #include "eSEClientIntf.h" 25 #endif 26 #include "eSEClientExtns.h" 27 #include "phNxpNciHal_IoctlOperations.h" 28 29 #include <vendor/nxp/nxpnfc/2.0/types.h> 30 31 /********************* Definitions and structures *****************************/ 32 #define MAX_RETRY_COUNT 5 33 #define NCI_MAX_DATA_LEN 300 34 #define NCI_POLL_DURATION 500 35 #define HAL_NFC_ENABLE_I2C_FRAGMENTATION_EVT 0x07 36 #undef P2P_PRIO_LOGIC_HAL_IMP 37 #define NCI_VERSION_2_0 0x20 38 #define NCI_VERSION_1_1 0x11 39 #define NCI_VERSION_1_0 0x10 40 #define NCI_VERSION_UNKNOWN 0x00 41 #define NXP_AUTH_TIMEOUT_BUF_LEN 0x04 42 #define SN1XX_ROM_VERSION 0x01 43 #define SN1XX_FW_MAJOR_VERSION 0x10 44 #define SN2XX_ROM_VERSION 0x01 45 #define SN2XX_FW_MAJOR_VERSION 0x01 46 47 /*Mem alloc with 8 byte alignment*/ 48 #define size_align(sz) ((((sz)-1) | 7) + 1) 49 #define nxp_malloc(size) malloc(size_align((size))) 50 51 typedef void(phNxpNciHal_control_granted_callback_t)(); 52 53 /*ROM CODE VERSION FW*/ 54 #define FW_MOBILE_ROM_VERSION_PN551 0x10 55 #define FW_MOBILE_ROM_VERSION_PN553 0x11 56 #define FW_MOBILE_ROM_VERSION_PN557 0x12 57 58 #define FW_DBG_REASON_AVAILABLE (0xA3) 59 60 #define HOST_ID 0x00 61 #define ESE_ID 0x01 62 #define UICC1_ID 0x02 63 #define UICC2_ID 0x04 64 #define UICC3_ID 0x08 65 /* NCI Data */ 66 67 //#define NCI_MT_CMD 0x20 68 //#define NCI_MT_RSP 0x40 69 //#define NCI_MT_NTF 0x60 70 71 #define CORE_RESET_TRIGGER_TYPE_CORE_RESET_CMD_RECEIVED 0x02 72 #define CORE_RESET_TRIGGER_TYPE_POWERED_ON 0x01 73 #define NCI2_0_CORE_RESET_TRIGGER_TYPE_OVER_TEMPERATURE ((uint8_t)0xA1) 74 #define CORE_RESET_TRIGGER_TYPE_UNRECOVERABLE_ERROR 0x00 75 #define CORE_RESET_TRIGGER_TYPE_FW_ASSERT ((uint8_t)0xA0) 76 #define CORE_RESET_TRIGGER_TYPE_WATCHDOG_RESET ((uint8_t)0xA3) 77 #define CORE_RESET_TRIGGER_TYPE_INPUT_CLOCK_LOST ((uint8_t)0xA4) 78 //#define NCI_MSG_CORE_RESET 0x00 79 //#define NCI_MSG_CORE_INIT 0x01 80 #define NCI_MT_MASK 0xE0 81 #define NCI_OID_MASK 0x3F 82 #if (NXP_EXTNS == TRUE) 83 /* GID: Group Identifier (byte 0) */ 84 #define NCI_GID_MASK 0x0F 85 #define ORIG_NXPHAL 0x01 86 #define ORIG_LIBNFC 0x02 87 #endif 88 #define NXP_PROPCMD_GID 0x2F 89 #define NXP_FLUSH_SRAM_AO_TO_FLASH 0x21 90 #define NXP_CORE_GET_CONFIG_CMD 0x03 91 #define NXP_CORE_SET_CONFIG_CMD 0x02 92 #define NXP_MAX_CONFIG_STRING_LEN 260 93 #define NCI_HEADER_SIZE 3 94 95 typedef struct nci_data { 96 uint16_t len; 97 uint8_t p_data[NCI_MAX_DATA_LEN]; 98 } nci_data_t; 99 100 typedef enum { 101 HAL_STATUS_CLOSE = 0, 102 HAL_STATUS_OPEN, 103 HAL_STATUS_MIN_OPEN 104 } phNxpNci_HalStatus; 105 106 typedef enum { 107 HAL_NFC_FW_UPDATE_INVALID = 0x00, 108 HAL_NFC_FW_UPDATE_START, 109 HAL_NFC_FW_UPDATE_SCUCCESS, 110 HAL_NFC_FW_UPDATE_FAILED, 111 } HalNfcFwUpdateStatus; 112 113 typedef enum { 114 GPIO_UNKNOWN = 0x00, 115 GPIO_STORE = 0x01, 116 GPIO_STORE_DONE = 0x02, 117 GPIO_RESTORE = 0x10, 118 GPIO_RESTORE_DONE = 0x20, 119 GPIO_CLEAR = 0xFF 120 } phNxpNciHal_GpioInfoState; 121 #ifdef NXP_BOOTTIME_UPDATE 122 extern ese_update_state_t ese_update; 123 #endif 124 typedef struct phNxpNciGpioInfo { 125 phNxpNciHal_GpioInfoState state; 126 uint8_t values[2]; 127 } phNxpNciGpioInfo_t; 128 129 /* Macros to enable and disable extensions */ 130 #define HAL_ENABLE_EXT() (nxpncihal_ctrl.hal_ext_enabled = 1) 131 #define HAL_DISABLE_EXT() (nxpncihal_ctrl.hal_ext_enabled = 0) 132 typedef struct phNxpNciInfo { 133 uint8_t nci_version; 134 bool_t wait_for_ntf; 135 uint8_t lastResetNtfReason; 136 } phNxpNciInfo_t; 137 /* NCI Control structure */ 138 typedef struct phNxpNciHal_Control { 139 phNxpNci_HalStatus halStatus; /* Indicate if hal is open or closed */ 140 pthread_t client_thread; /* Integration thread handle */ 141 uint8_t thread_running; /* Thread running if set to 1, else set to 0 */ 142 phLibNfc_sConfig_t gDrvCfg; /* Driver config data */ 143 144 /* Rx data */ 145 uint8_t* p_rx_data; 146 uint16_t rx_data_len; 147 148 /* Rx data */ 149 uint8_t* p_rx_ese_data; 150 uint16_t rx_ese_data_len; 151 152 /* libnfc-nci callbacks */ 153 nfc_stack_callback_t* p_nfc_stack_cback; 154 nfc_stack_data_callback_t* p_nfc_stack_data_cback; 155 156 /* control granted callback */ 157 phNxpNciHal_control_granted_callback_t* p_control_granted_cback; 158 159 /* HAL open status */ 160 bool_t hal_open_status; 161 162 /* HAL extensions */ 163 uint8_t hal_ext_enabled; 164 165 /* Waiting semaphore */ 166 phNxpNciHal_Sem_t ext_cb_data; 167 sem_t syncSpiNfc; 168 169 uint16_t cmd_len; 170 uint8_t p_cmd_data[NCI_MAX_DATA_LEN]; 171 uint16_t rsp_len; 172 uint8_t p_rsp_data[NCI_MAX_DATA_LEN]; 173 174 /* retry count used to force download */ 175 uint16_t retry_cnt; 176 uint8_t read_retry_cnt; 177 phNxpNciInfo_t nci_info; 178 uint8_t hal_boot_mode; 179 bool_t fwdnld_mode_reqd; 180 /* to store and restore gpio values */ 181 phNxpNciGpioInfo_t phNxpNciGpioInfo; 182 tNFC_chipType chipType; 183 } phNxpNciHal_Control_t; 184 185 typedef struct { 186 uint8_t fw_update_reqd; 187 uint8_t rf_update_reqd; 188 } phNxpNciHal_FwRfupdateInfo_t; 189 190 typedef struct phNxpNciClock { 191 bool_t isClockSet; 192 uint8_t p_rx_data[20]; 193 bool_t issetConfig; 194 } phNxpNciClock_t; 195 196 typedef struct phNxpNciRfSetting { 197 bool_t isGetRfSetting; 198 uint8_t p_rx_data[20]; 199 } phNxpNciRfSetting_t; 200 201 typedef struct phNxpNciMwEepromArea { 202 bool_t isGetEepromArea; 203 uint8_t p_rx_data[32]; 204 } phNxpNciMwEepromArea_t; 205 206 enum { SE_TYPE_ESE, SE_TYPE_UICC, SE_TYPE_UICC2, NUM_SE_TYPES }; 207 208 typedef void (*fpVerInfoStoreInEeprom_t)(); 209 typedef int (*fpVerifyCscEfsTest_t)(char* nfcc_csc, char* rffilepath, 210 char* fwfilepath); 211 typedef int (*fpRegRfFwDndl_t)(uint8_t* fw_update_req, uint8_t* rf_update_req, 212 uint8_t skipEEPROMRead); 213 typedef int (*fpPropConfCover_t)(bool attached, int type); 214 void phNxpNciHal_initializeRegRfFwDnld(); 215 void phNxpNciHal_deinitializeRegRfFwDnld(); 216 /*set config management*/ 217 218 #define TOTAL_DURATION 0x00 219 #define ATR_REQ_GEN_BYTES_POLL 0x29 220 #define ATR_REQ_GEN_BYTES_LIS 0x61 221 #define LEN_WT 0x60 222 223 /*Whenever a new get cfg need to be sent, 224 * array must be updated with defined config type*/ 225 static const uint8_t get_cfg_arr[] = {TOTAL_DURATION, ATR_REQ_GEN_BYTES_POLL, 226 ATR_REQ_GEN_BYTES_LIS, LEN_WT}; 227 228 //#define NXP_NFC_SET_CONFIG_PARAM_EXT 0xA0 229 //#define NXP_NFC_PARAM_ID_SWP2 0xD4 230 //#define NXP_NFC_PARAM_ID_SWPUICC3 0xDC 231 typedef enum { 232 EEPROM_RF_CFG, 233 EEPROM_FW_DWNLD, 234 EEPROM_WIREDMODE_RESUME_TIMEOUT, 235 EEPROM_ESE_SVDD_POWER, 236 EEPROM_ESE_POWER_EXT_PMU, 237 EEPROM_PROP_ROUTING, 238 EEPROM_ESE_SESSION_ID, 239 EEPROM_SWP1_INTF, 240 EEPROM_SWP1A_INTF, 241 EEPROM_SWP2_INTF, 242 EEPROM_FLASH_UPDATE, 243 EEPROM_AUTH_CMD_TIMEOUT, 244 EEPROM_GUARD_TIMER, 245 EEPROM_T4T_NFCEE_ENABLE, 246 EEPROM_AUTONOMOUS_MODE, 247 EEPROM_CE_PHONE_OFF_CFG, 248 EEPROM_ENABLE_VEN_CFG, 249 EEPROM_ISODEP_MERGE_SAK, 250 EEPROM_SRD_TIMEOUT, 251 EEPROM_UICC1_SESSION_ID, 252 EEPROM_UICC2_SESSION_ID, 253 } phNxpNci_EEPROM_request_type_t; 254 255 typedef struct phNxpNci_EEPROM_info { 256 uint8_t request_mode; 257 phNxpNci_EEPROM_request_type_t request_type; 258 uint8_t update_mode; 259 uint8_t* buffer; 260 uint8_t bufflen; 261 } phNxpNci_EEPROM_info_t; 262 263 typedef struct phNxpNci_getCfg_info { 264 bool_t isGetcfg; 265 uint8_t total_duration[4]; 266 uint8_t total_duration_len; 267 uint8_t atr_req_gen_bytes[48]; 268 uint8_t atr_req_gen_bytes_len; 269 uint8_t atr_res_gen_bytes[48]; 270 uint8_t atr_res_gen_bytes_len; 271 uint8_t pmid_wt[3]; 272 uint8_t pmid_wt_len; 273 uint8_t auth_cmd_timeout[NXP_AUTH_TIMEOUT_BUF_LEN]; 274 uint8_t auth_cmd_timeoutlen; 275 } phNxpNci_getCfg_info_t; 276 typedef enum { 277 NFC_FORUM_PROFILE, 278 EMV_CO_PROFILE, 279 SRD_PROFILE, 280 INVALID_PROFILe 281 } phNxpNciProfile_t; 282 /* NXP Poll Profile control structure */ 283 typedef struct phNxpNciProfile_Control { 284 phNxpNciProfile_t profile_type; 285 uint8_t bClkSrcVal; /* Holds the System clock source read from config file */ 286 uint8_t 287 bClkFreqVal; /* Holds the System clock frequency read from config file */ 288 uint8_t bTimeout; /* Holds the Timeout Value */ 289 uint8_t clkReqDelay; /* Holds default delay time before start clock request*/ 290 } phNxpNciProfile_Control_t; 291 292 /* Internal messages to handle callbacks */ 293 #define NCI_HAL_OPEN_CPLT_MSG 0x411 294 #define NCI_HAL_CLOSE_CPLT_MSG 0x412 295 #define NCI_HAL_POST_INIT_CPLT_MSG 0x413 296 #define NCI_HAL_PRE_DISCOVER_CPLT_MSG 0x414 297 #define NCI_HAL_ERROR_MSG 0x415 298 #define NCI_HAL_HCI_NETWORK_RESET_MSG 0x416 299 #define NCI_HAL_RX_MSG 0xF01 300 #define HAL_NFC_FW_UPDATE_STATUS_EVT 0x0A 301 302 #define NCIHAL_CMD_CODE_LEN_BYTE_OFFSET (2U) 303 #define NCIHAL_CMD_CODE_BYTE_LEN (3U) 304 305 /******************** NCI HAL exposed functions *******************************/ 306 int phNxpNciHal_check_ncicmd_write_window(uint16_t cmd_len, uint8_t* p_cmd); 307 void phNxpNciHal_request_control(void); 308 void phNxpNciHal_release_control(void); 309 NFCSTATUS phNxpNciHal_send_get_cfgs(); 310 int phNxpNciHal_write_unlocked(uint16_t data_len, const uint8_t* p_data, 311 int origin); 312 NFCSTATUS request_EEPROM(phNxpNci_EEPROM_info_t* mEEPROM_info); 313 int phNxpNciHal_check_config_parameter(); 314 NFCSTATUS phNxpNciHal_fw_download(uint8_t seq_handler_offset = 0, 315 bool bIsNfccDlState = false); 316 NFCSTATUS phNxpNciHal_nfcc_core_reset_init(bool keep_config = false); 317 int phNxpNciHal_fw_mw_ver_check(); 318 NFCSTATUS phNxpNciHal_check_clock_config(void); 319 NFCSTATUS phNxpNciHal_china_tianjin_rf_setting(void); 320 NFCSTATUS phNxpNciHal_CheckValidFwVersion(void); 321 322 NFCSTATUS phNxpNciHal_send_nfcee_pwr_cntl_cmd(uint8_t type); 323 /******************************************************************************* 324 ** 325 ** Function phNxpNciHal_configFeatureList 326 ** 327 ** Description Configures the featureList based on chip type 328 ** HW Version information number will provide chipType. 329 ** HW Version can be obtained from CORE_INIT_RESPONSE(NCI 1.0) 330 ** or CORE_RST_NTF(NCI 2.0) 331 ** 332 ** Parameters CORE_INIT_RESPONSE/CORE_RST_NTF, len 333 ** 334 ** Returns none 335 *******************************************************************************/ 336 void phNxpNciHal_configFeatureList(uint8_t* init_rsp, uint16_t rsp_len); 337 338 /****************************************************************************** 339 * Function phNxpNciHal_read_and_update_se_state 340 * 341 * Description This will read NFCEE status from system properties 342 * and update to NFCC to enable/disable. 343 * 344 * Returns none 345 * 346 ******************************************************************************/ 347 void phNxpNciHal_read_and_update_se_state(); 348 349 /****************************************************************************** 350 * Function phNxpNciHal_Abort 351 * 352 * Description This will post the message to the upper layer 353 * using the callback p_nfc_stack_cback_backup. 354 * 355 * Returns none 356 * 357 ******************************************************************************/ 358 extern bool phNxpNciHal_Abort(); 359 /****************************************************************************** 360 * Function phNxpNciHal_read_fw_dw_status 361 * 362 * Description This will read the value of fw download status flag 363 * from eeprom 364 * 365 * Parameters value - this parameter will be updated with the flag 366 * value from eeprom. 367 * 368 * Returns status of the read 369 * 370 ******************************************************************************/ 371 NFCSTATUS phNxpNciHal_read_fw_dw_status(uint8_t& value); 372 373 /****************************************************************************** 374 * Function phNxpNciHal_write_fw_dw_status 375 * 376 * Description This will update value of fw download status flag 377 * to eeprom 378 * 379 * Parameters value - this value will be updated to eeprom flag. 380 * 381 * Returns status of the write 382 * 383 ******************************************************************************/ 384 NFCSTATUS phNxpNciHal_write_fw_dw_status(uint8_t value); 385 386 /****************************************************************************** 387 * Function phNxpNciHal_set_uicc_hci_params 388 * 389 * Description This will update value of uicc session status to store flag 390 * to eeprom 391 * 392 * Parameters value - this value will be updated to eeprom flag. 393 * 394 * Returns status of the write 395 * 396 ******************************************************************************/ 397 NFCSTATUS 398 phNxpNciHal_set_uicc_hci_params(std::vector<uint8_t>& ptr, uint8_t bufflen, 399 phNxpNci_EEPROM_request_type_t uiccType); 400 401 /****************************************************************************** 402 * Function phNxpNciHal_get_uicc_hci_params 403 * 404 * Description This will read the value of fw download status flag 405 * from eeprom 406 * 407 * Parameters value - this parameter will be updated with the flag 408 * value from eeprom. 409 * 410 * Returns status of the read 411 * 412 ******************************************************************************/ 413 NFCSTATUS 414 phNxpNciHal_get_uicc_hci_params(std::vector<uint8_t>& ptr, uint8_t bufflen, 415 phNxpNci_EEPROM_request_type_t uiccType); 416 417 #endif /* _PHNXPNCIHAL_H_ */ 418