Searched refs:dpu_aeu_wr (Results 1 – 5 of 5) sorted by relevance
/hardware/google/gchips/gralloc3/src/ |
D | format_info.cpp | 139 …rd = F_LIN | F_AFBC, .dpu_wr = F_NONE, .dpu_rd = F_LIN | S_AFBC, .dpu_aeu_wr = F_AFBC, .vpu_w… 140 …rd = F_LIN | F_AFBC, .dpu_wr = F_LIN, .dpu_rd = F_LIN | F_AFBC, .dpu_aeu_wr = F_AFBC, .vpu_w… 141 …rd = F_LIN | F_AFBC, .dpu_wr = F_LIN, .dpu_rd = F_LIN | F_AFBC, .dpu_aeu_wr = F_AFBC, .vpu_w… 142 …rd = S_LIN, .dpu_wr = F_LIN, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_w… 143 …rd = S_LIN | S_AFBC, .dpu_wr = F_LIN, .dpu_rd = F_LIN | S_AFBC, .dpu_aeu_wr = F_NONE, .vpu_w… 145 …rd = F_LIN | F_AFBC, .dpu_wr = F_LIN, .dpu_rd = F_LIN, .dpu_aeu_wr = F_AFBC, .vpu_w… 146 …rd = F_LIN, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_w… 149 …rd = F_NONE, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_w… 150 …rd = F_NONE, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_w… 153 …rd = F_AFBC, .dpu_wr = F_NONE, .dpu_rd = F_AFBC, .dpu_aeu_wr = F_AFBC, .vpu_w… [all …]
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D | format_info.h | 82 uint8_t dpu_aeu_wr; /* DPU AEU producer. */ member
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D | mali_gralloc_formats.cpp | 653 support &= format->dpu_aeu_wr; in ip_supports_base_format()
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/hardware/google/gchips/gralloc4/src/core/ |
D | format_info.cpp | 129 … .gpu_wr = F_LIN, .dpu_rd = F_LIN|F_AFBC, .dpu_wr = F_NONE, .dpu_aeu_wr = F_AFBC, .vpu_r… 130 …BC, .gpu_wr = F_LIN|F_AFBC, .dpu_rd = F_LIN|F_AFBC, .dpu_wr = F_LIN, .dpu_aeu_wr = F_AFBC, .vpu_r… 131 …BC, .gpu_wr = F_LIN|F_AFBC, .dpu_rd = F_LIN|F_AFBC, .dpu_wr = F_LIN, .dpu_aeu_wr = F_AFBC, .vpu_r… 132 … .gpu_wr = F_LIN, .dpu_rd = F_LIN, .dpu_wr = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_r… 133 …BC, .gpu_wr = F_LIN|F_AFBC, .dpu_rd = F_LIN|F_AFBC, .dpu_wr = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_r… 134 …BC, .gpu_wr = F_LIN|F_AFBC, .dpu_rd = F_LIN|F_AFBC, .dpu_wr = F_LIN, .dpu_aeu_wr = F_AFBC, .vpu_r… 135 …BC, .gpu_wr = F_LIN|F_AFBC, .dpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_r… 136 … .gpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_r… 137 … .gpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_r… 139 … .gpu_wr = F_NONE, .dpu_rd = F_AFBC, .dpu_wr = F_NONE, .dpu_aeu_wr = F_AFBC, .vpu_r… [all …]
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D | format_info.h | 98 format_support_flags dpu_aeu_wr; /* DPU AEU producer. (UNUSED IN EXYNOS) */ member
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