Searched refs:vpu_wr (Results 1 – 6 of 6) sorted by relevance
/hardware/google/gchips/gralloc3/src/ |
D | format_info.cpp | 139 … .dpu_wr = F_NONE, .dpu_rd = F_LIN | S_AFBC, .dpu_aeu_wr = F_AFBC, .vpu_wr = F_LIN, .vpu_rd =… 140 … .dpu_wr = F_LIN, .dpu_rd = F_LIN | F_AFBC, .dpu_aeu_wr = F_AFBC, .vpu_wr = F_LIN, .vpu_rd =… 141 … .dpu_wr = F_LIN, .dpu_rd = F_LIN | F_AFBC, .dpu_aeu_wr = F_AFBC, .vpu_wr = F_LIN, .vpu_rd =… 142 … .dpu_wr = F_LIN, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd =… 143 … .dpu_wr = F_LIN, .dpu_rd = F_LIN | S_AFBC, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd =… 145 … .dpu_wr = F_LIN, .dpu_rd = F_LIN, .dpu_aeu_wr = F_AFBC, .vpu_wr = F_LIN, .vpu_rd =… 146 … .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd =… 149 … .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd =… 150 … .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd =… 153 … .dpu_wr = F_NONE, .dpu_rd = F_AFBC, .dpu_aeu_wr = F_AFBC, .vpu_wr = F_AFBC, .vpu_rd … [all …]
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D | format_info.h | 83 uint8_t vpu_wr; /* VPU producer. */ member
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D | mali_gralloc_formats.cpp | 662 support &= format->vpu_wr; in ip_supports_base_format()
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/hardware/google/gchips/gralloc4/src/core/ |
D | format_info.cpp | 129 …F_LIN|F_AFBC, .dpu_wr = F_NONE, .dpu_aeu_wr = F_AFBC, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr … 130 …F_LIN|F_AFBC, .dpu_wr = F_LIN, .dpu_aeu_wr = F_AFBC, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr … 131 …F_LIN|F_AFBC, .dpu_wr = F_LIN, .dpu_aeu_wr = F_AFBC, .vpu_rd = F_LIN, .vpu_wr = F_NONE, .cam_wr … 132 …F_LIN, .dpu_wr = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_rd = F_LIN, .vpu_wr = F_NONE, .cam_wr … 133 …F_LIN|F_AFBC, .dpu_wr = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr … 134 …F_LIN|F_AFBC, .dpu_wr = F_LIN, .dpu_aeu_wr = F_AFBC, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr … 135 …F_NONE, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr … 136 …F_NONE, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr … 137 …F_NONE, .dpu_wr = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_rd = F_NONE, .vpu_wr = F_NONE, .cam_wr … 139 …F_AFBC, .dpu_wr = F_NONE, .dpu_aeu_wr = F_AFBC, .vpu_rd = F_AFBC, .vpu_wr = F_AFBC, .cam_wr … [all …]
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D | format_info.h | 99 format_support_flags vpu_wr; /* VPU producer. */ member
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D | mali_gralloc_formats.cpp | 478 support &= format->vpu_wr; in ip_supports_base_format()
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