Searched refs:IP0 (Results 1 – 6 of 6) sorted by relevance
| /art/disassembler/ |
| D | disassembler_arm64.cc | 38 IP0 = 16, enumerator
117 target->GetRt() == IP0 && in VisitUnconditionalBranch()
120 target->GetNextInstruction()->GetRn() == IP0) { in VisitUnconditionalBranch()
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| /art/compiler/trampolines/ |
| D | trampoline_compiler.cc | 109 Arm64ManagedRegister::FromXRegister(IP0)); in CreateTrampoline()
114 Arm64ManagedRegister::FromXRegister(IP0)); in CreateTrampoline()
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| /art/runtime/arch/arm64/ |
| D | registers_arm64.h | 65 IP0 = X16, // Used as scratch by VIXL. enumerator
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| /art/compiler/utils/arm64/ |
| D | managed_register_arm64_test.cc | 92 EXPECT_EQ(IP0, reg.AsXRegister()); in TEST()
628 EXPECT_TRUE(vixl::aarch64::ip0.Is(Arm64Assembler::reg_x(IP0))); in TEST()
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| /art/compiler/optimizing/ |
| D | intrinsics_arm64.cc | 134 DCHECK_NE(LocationFrom(src_curr_addr).reg(), IP0); in EmitNativeCode()
135 DCHECK_NE(LocationFrom(dst_curr_addr).reg(), IP0); in EmitNativeCode()
136 DCHECK_NE(LocationFrom(src_stop_addr).reg(), IP0); in EmitNativeCode()
137 DCHECK_NE(tmp_.reg(), IP0); in EmitNativeCode()
3028 DCHECK_NE(LocationFrom(tmp).reg(), IP0); in VisitSystemArrayCopy()
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| D | code_generator_arm64.cc | 5120 assembler.JumpTo(ManagedRegister(arm64::X0), offset, ManagedRegister(arm64::IP0)); in EmitThunkCode()
5128 assembler.JumpTo(ManagedRegister(arm64::TR), offset, ManagedRegister(arm64::IP0)); in EmitThunkCode()
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