Home
last modified time | relevance | path

Searched refs:align_w_cpu (Results 1 – 6 of 6) sorted by relevance

/hardware/google/gchips/gralloc3/src/
Dformat_info.cpp27 #define ALIGN_W_CPU_DEFAULT .align_w_cpu = 1
37 … = { 16, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_s…
38 … = { 24, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_s…
39 … = { 32, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_s…
40 … = { 32, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_s…
41 … = { 32, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_s…
43 … = { 32, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_s…
44 … = { 64, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_s…
47 … = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .align_w = 2, .align_h = 2, .align_w_cpu = 16, .tile_s…
48 … = { 16, 0, 0 }, .hsub = 1, .vsub = 1, .align_w = 2, .align_h = 2, .align_w_cpu = 16, .tile_s…
[all …]
Dformat_info.h60 …uint8_t align_w_cpu; /* Alignment of width for CPU access (per plane, in pixels). ALIGN… member
Dmali_gralloc_bufferallocation.cpp332 pixel_align_w = format.align_w_cpu; in get_pixel_w_h()
525 assert((format.bpp[plane] * format.align_w_cpu) % 8 == 0); in calc_allocation_size()
527 cpu_align = (format.bpp[plane] * format.align_w_cpu) / 8; in calc_allocation_size()
/hardware/google/gchips/gralloc4/src/core/
Dformat_info.cpp29 #define ALIGN_W_CPU_DEFAULT .align_w_cpu = 1
41 … = { 16, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_s…
42 … = { 24, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_s…
43 … = { 32, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_s…
44 … = { 32, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_s…
45 … = { 32, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_s…
46 … = { 32, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_s…
47 … = { 64, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_s…
48 … = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .align_w = 2, .align_h = 2, .align_w_cpu = 16, .tile_s…
49 … = { 16, 0, 0 }, .hsub = 1, .vsub = 1, .align_w = 2, .align_h = 2, .align_w_cpu = 16, .tile_s…
[all …]
Dformat_info.h66 …uint8_t align_w_cpu; /* Alignment of width for CPU access (per plane, in pixels). ALIGN… member
Dmali_gralloc_bufferallocation.cpp344 pixel_align_w = format.align_w_cpu; in get_pixel_w_h()
591 assert((format.bpp[plane] * format.align_w_cpu) % 8 == 0); in calc_allocation_size()
595 cpu_align = (format.bpp[plane] * format.align_w_cpu) / 8; in calc_allocation_size()