1 /* 2 * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are 6 * met: 7 * * Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * * Redistributions in binary form must reproduce the above 10 * copyright notice, this list of conditions and the following 11 * disclaimer in the documentation and/or other materials provided 12 * with the distribution. 13 * * Neither the name of The Linux Foundation nor the names of its 14 * contributors may be used to endorse or promote products derived 15 * from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED 18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #ifndef __DRM_INTERFACE_H__ 31 #define __DRM_INTERFACE_H__ 32 33 #include <map> 34 #include <string> 35 #include <utility> 36 #include <vector> 37 #include <array> 38 39 #include "xf86drm.h" 40 #include "xf86drmMode.h" 41 #include <drm/msm_drm.h> 42 #include <drm/msm_drm_pp.h> 43 44 #ifdef KERNEL_5_4 45 #include <drm/sde_drm.h> 46 #endif 47 48 namespace sde_drm { 49 50 typedef std::map<std::pair<uint32_t, uint64_t>, float> CompRatioMap; 51 52 /* 53 * Drm Atomic Operation Codes 54 */ 55 enum struct DRMOps { 56 /* 57 * Op: Sets plane source crop 58 * Arg: uint32_t - Plane ID 59 * DRMRect - Source Rectangle 60 */ 61 PLANE_SET_SRC_RECT, 62 /* 63 * Op: Sets plane destination rect 64 * Arg: uint32_t - Plane ID 65 * DRMRect - Dst Rectangle 66 */ 67 PLANE_SET_DST_RECT, 68 /* 69 * Op: Sets plane exclusion rect 70 * Arg: uint32_t - Plane ID 71 * drm_clip_rect - Exclusion Rectangle 72 */ 73 PLANE_SET_EXCL_RECT, 74 /* 75 * Op: Sets plane zorder 76 * Arg: uint32_t - Plane ID 77 * uint32_t - zorder 78 */ 79 PLANE_SET_ZORDER, 80 /* 81 * Op: Sets plane rotation flags 82 * Arg: uint32_t - Plane ID 83 * uint32_t - bit mask of rotation flags (See drm_mode.h for enums) 84 */ 85 PLANE_SET_ROTATION, 86 /* 87 * Op: Sets plane alpha 88 * Arg: uint32_t - Plane ID 89 * uint32_t - alpha value 90 */ 91 PLANE_SET_ALPHA, 92 /* 93 * Op: Sets the blend type 94 * Arg: uint32_t - Plane ID 95 * uint32_t - blend type (see DRMBlendType) 96 */ 97 PLANE_SET_BLEND_TYPE, 98 /* 99 * Op: Sets horizontal decimation 100 * Arg: uint32_t - Plane ID 101 * uint32_t - decimation factor 102 */ 103 PLANE_SET_H_DECIMATION, 104 /* 105 * Op: Sets vertical decimation 106 * Arg: uint32_t - Plane ID 107 * uint32_t - decimation factor 108 */ 109 PLANE_SET_V_DECIMATION, 110 /* 111 * Op: Sets source config flags 112 * Arg: uint32_t - Plane ID 113 * uint32_t - flags to enable or disable a specific op. E.g. deinterlacing 114 */ 115 PLANE_SET_SRC_CONFIG, 116 /* 117 * Op: Sets frame buffer ID for plane. Set together with CRTC. 118 * Arg: uint32_t - Plane ID 119 * uint32_t - Framebuffer ID 120 */ 121 PLANE_SET_FB_ID, 122 /* 123 * Op: Sets the crtc for this plane. Set together with FB_ID. 124 * Arg: uint32_t - Plane ID 125 * uint32_t - CRTC ID 126 */ 127 PLANE_SET_CRTC, 128 /* 129 * Op: Sets acquire fence for this plane's buffer. Set together with FB_ID, CRTC. 130 * Arg: uint32_t - Plane ID 131 * uint32_t - Input fence 132 */ 133 PLANE_SET_INPUT_FENCE, 134 /* 135 * Op: Sets scaler config on this plane. 136 * Arg: uint32_t - Plane ID 137 * uint64_t - Address of the scaler config object (version based) 138 */ 139 PLANE_SET_SCALER_CONFIG, 140 /* 141 * Op: Sets FB Secure mode for this plane. 142 * Arg: uint32_t - Plane ID 143 * uint32_t - Value of the FB Secure mode. 144 */ 145 PLANE_SET_FB_SECURE_MODE, 146 /* 147 * Op: Sets csc config on this plane. 148 * Arg: uint32_t - Plane ID 149 * uint32_t* - pointer to csc type 150 */ 151 PLANE_SET_CSC_CONFIG, 152 /* 153 * Op: Sets multirect mode on this plane. 154 * Arg: uint32_t - Plane ID 155 * uint32_t - multirect mode 156 */ 157 PLANE_SET_MULTIRECT_MODE, 158 /* 159 * Op: Sets sspp layout on this plane. 160 * Arg: uint32_t - Plane ID 161 * uint32_t - SSPP Layout Index 162 */ 163 PLANE_SET_SSPP_LAYOUT, 164 /* 165 * Op: Sets rotator output frame buffer ID for plane. 166 * Arg: uint32_t - Plane ID 167 * uint32_t - Framebuffer ID 168 */ 169 PLANE_SET_ROT_FB_ID, 170 /* 171 * Op: Sets inverse pma mode on this plane. 172 * Arg: uint32_t - Plane ID 173 * uint32_t - enable/disable inverse pma. 174 */ 175 PLANE_SET_INVERSE_PMA, 176 /* 177 * Op: Sets csc config on this plane. 178 * Arg: uint32_t - Plane ID 179 * uint64_t - Address of the csc config object(version based) 180 */ 181 PLANE_SET_DGM_CSC_CONFIG, 182 /* 183 * Op: Sets SSPP Feature 184 * Arg: uint32_t - Plane ID 185 * DRMPPFeatureInfo * - PP feature data pointer 186 */ 187 PLANE_SET_POST_PROC, 188 /* 189 * Op: Activate or deactivate a CRTC 190 * Arg: uint32_t - CRTC ID 191 * uint32_t - 1 to enable, 0 to disable 192 */ 193 CRTC_SET_ACTIVE, 194 /* 195 * Op: Sets display mode 196 * Arg: uint32_t - CRTC ID 197 * drmModeModeInfo* - Pointer to display mode 198 */ 199 CRTC_SET_MODE, 200 /* 201 * Op: Sets an offset indicating when a release fence should be signalled. 202 * Arg: uint32_t - offset 203 * 0: non-speculative, default 204 * 1: speculative 205 */ 206 CRTC_SET_OUTPUT_FENCE_OFFSET, 207 /* 208 * Op: Sets overall SDE core clock 209 * Arg: uint32_t - CRTC ID 210 * uint32_t - core_clk 211 */ 212 CRTC_SET_CORE_CLK, 213 /* 214 * Op: Sets MNOC bus average bandwidth 215 * Arg: uint32_t - CRTC ID 216 * uint32_t - core_ab 217 */ 218 CRTC_SET_CORE_AB, 219 /* 220 * Op: Sets MNOC bus instantaneous bandwidth 221 * Arg: uint32_t - CRTC ID 222 * uint32_t - core_ib 223 */ 224 CRTC_SET_CORE_IB, 225 /* 226 * Op: Sets LLCC Bus average bandwidth 227 * Arg: uint32_t - CRTC ID 228 * uint32_t - llcc_ab 229 */ 230 CRTC_SET_LLCC_AB, 231 /* 232 * Op: Sets LLCC Bus instantaneous bandwidth 233 * Arg: uint32_t - CRTC ID 234 * uint32_t - llcc_ib 235 */ 236 CRTC_SET_LLCC_IB, 237 /* 238 * Op: Sets DRAM bus average bandwidth 239 * Arg: uint32_t - CRTC ID 240 * uint32_t - dram_ab 241 */ 242 CRTC_SET_DRAM_AB, 243 /* 244 * Op: Sets DRAM bus instantaneous bandwidth 245 * Arg: uint32_t - CRTC ID 246 * uint32_t - dram_ib 247 */ 248 CRTC_SET_DRAM_IB, 249 /* 250 * Op: Sets Rotator BW for inline rotation 251 * Arg: uint32_t - CRTC ID 252 * uint32_t - rot_bw 253 */ 254 CRTC_SET_ROT_PREFILL_BW, 255 /* 256 * Op: Sets rotator clock for inline rotation 257 * Arg: uint32_t - CRTC ID 258 * uint32_t - rot_clk 259 */ 260 CRTC_SET_ROT_CLK, 261 /* 262 * Op: Sets destination scalar data 263 * Arg: uint32_t - CRTC ID 264 * uint64_t - Pointer to destination scalar data 265 */ 266 CRTC_SET_DEST_SCALER_CONFIG, 267 /* 268 * Op: Returns release fence for this frame. Should be called after Commit() on 269 * DRMAtomicReqInterface. 270 * Arg: uint32_t - CRTC ID 271 * int * - Pointer to an integer that will hold the returned fence 272 */ 273 CRTC_GET_RELEASE_FENCE, 274 /* 275 * Op: Sets PP feature 276 * Arg: uint32_t - CRTC ID 277 * DRMPPFeatureInfo * - PP feature data pointer 278 */ 279 CRTC_SET_POST_PROC, 280 /* 281 * Op: Sets CRTC ROIs. 282 * Arg: uint32_t - CRTC ID 283 * uint32_t - number of ROIs 284 * DRMRect * - Array of CRTC ROIs 285 */ 286 CRTC_SET_ROI, 287 /* 288 * Op: Sets Security level for CRTC. 289 * Arg: uint32_t - CRTC ID 290 * uint32_t - Security level 291 */ 292 CRTC_SET_SECURITY_LEVEL, 293 /* 294 * Op: sets solid fill stages 295 * Arg: uint32_t - CRTC ID 296 * Vector of DRMSolidfillStage 297 */ 298 CRTC_SET_SOLIDFILL_STAGES, 299 /* 300 * Op: Sets idle timeout. 301 * Arg: uint32_t - CRTC ID 302 * uint32_t - idle timeout in ms 303 */ 304 CRTC_SET_IDLE_TIMEOUT, 305 /* 306 * Op: Sets Capture mode for Concurrent Writeback feature. 307 * Arg: uint32_t - CRTC ID 308 * uint32_t - Capture mode 309 */ 310 CRTC_SET_CAPTURE_MODE, 311 /* 312 * Op: Sets Idle PC state for CRTC. 313 * Arg: uint32_t - CRTC ID 314 * uint32_t - idle pc state 315 */ 316 CRTC_SET_IDLE_PC_STATE, 317 /* 318 * Op: Returns retire fence for this commit. Should be called after Commit() on 319 * DRMAtomicReqInterface. 320 * Arg: uint32_t - Connector ID 321 * int * - Pointer to an integer that will hold the returned fence 322 */ 323 CONNECTOR_GET_RETIRE_FENCE, 324 /* 325 * Op: Sets writeback connector destination rect 326 * Arg: uint32_t - Connector ID 327 * DRMRect - Dst Rectangle 328 */ 329 CONNECTOR_SET_OUTPUT_RECT, 330 /* 331 * Op: Sets frame buffer ID for writeback connector. 332 * Arg: uint32_t - Connector ID 333 * uint32_t - Framebuffer ID 334 */ 335 CONNECTOR_SET_OUTPUT_FB_ID, 336 /* 337 * Op: Sets power mode for connector. 338 * Arg: uint32_t - Connector ID 339 * uint32_t - Power Mode 340 */ 341 CONNECTOR_SET_POWER_MODE, 342 /* 343 * Op: Sets panel ROIs. 344 * Arg: uint32_t - Connector ID 345 * uint32_t - number of ROIs 346 * DRMRect * - Array of Connector ROIs 347 */ 348 CONNECTOR_SET_ROI, 349 /* 350 * Op: Sets the connector to autorefresh mode. 351 * Arg: uint32_t - Connector ID 352 * uint32_t - Enable-1, Disable-0 353 */ 354 CONNECTOR_SET_AUTOREFRESH, 355 /* 356 * Op: Set FB secure mode for Writeback connector. 357 * Arg: uint32_t - Connector ID 358 * uint32_t - FB Secure mode 359 */ 360 CONNECTOR_SET_FB_SECURE_MODE, 361 /* 362 * Op: Sets a crtc id to this connector 363 * Arg: uint32_t - Connector ID 364 * uint32_t - CRTC ID 365 */ 366 CONNECTOR_SET_CRTC, 367 /* 368 * Op: Sets PP feature 369 * Arg: uint32_t - Connector ID 370 * DRMPPFeatureInfo * - PP feature data pointer 371 */ 372 CONNECTOR_SET_POST_PROC, 373 /* 374 * Op: Sets connector hdr metadata 375 * Arg: uint32_t - Connector ID 376 * drm_msm_ext_hdr_metadata - hdr_metadata 377 */ 378 CONNECTOR_SET_HDR_METADATA, 379 /* 380 * Op: Cache Dpps features. 381 * Arg: uint32_t - Object ID 382 uint32_t - Feature ID 383 * uint64_t - Pointer to feature config data 384 */ 385 DPPS_CACHE_FEATURE, 386 /* 387 * Op: Commit Dpps features. 388 * Arg: drmModeAtomicReq - Atomic request 389 */ 390 DPPS_COMMIT_FEATURE, 391 /* 392 * Op: Sets qsync mode on connector 393 * Arg: uint32_t - Connector ID 394 * uint32_t - qsync mode 395 */ 396 CONNECTOR_SET_QSYNC_MODE, 397 /* 398 * Op: Sets topology control on this connector 399 * Arg: uint32_t - Connector ID 400 * uint32_t - Topology control bit-mask 401 */ 402 CONNECTOR_SET_TOPOLOGY_CONTROL, 403 /* 404 * Op: Sets frame trigger mode on this connector 405 * Arg: uint32_t - Connector ID 406 * uint32_t - Frame trigger mode 407 */ 408 CONNECTOR_SET_FRAME_TRIGGER, 409 /* 410 * Op: Sets colorspace on DP connector 411 * Arg: uint32_t - Connector ID 412 * uint32_t - colorspace value bit-mask 413 */ 414 CONNECTOR_SET_COLORSPACE, 415 }; 416 417 enum struct DRMRotation { 418 FLIP_H = 0x1, 419 FLIP_V = 0x2, 420 ROT_180 = FLIP_H | FLIP_V, 421 ROT_90 = 0x4, 422 }; 423 424 enum struct DRMPowerMode { 425 ON, 426 DOZE, 427 DOZE_SUSPEND, 428 OFF, 429 }; 430 431 enum struct DRMBlendType { 432 UNDEFINED = 0, 433 OPAQUE = 1, 434 PREMULTIPLIED = 2, 435 COVERAGE = 3, 436 }; 437 438 enum struct DRMSrcConfig { 439 DEINTERLACE = 0, 440 }; 441 442 enum struct DRMIdlePCState { 443 NONE, 444 ENABLE, 445 DISABLE, 446 }; 447 448 449 /* Display type to identify a suitable connector */ 450 enum struct DRMDisplayType { 451 PERIPHERAL, 452 TV, 453 VIRTUAL, 454 }; 455 456 struct DRMRect { 457 uint32_t left; // Left-most pixel coordinate. 458 uint32_t top; // Top-most pixel coordinate. 459 uint32_t right; // Right-most pixel coordinate. 460 uint32_t bottom; // Bottom-most pixel coordinate. 461 }; 462 463 //------------------------------------------------------------------------ 464 // DRM Info Query Types 465 //------------------------------------------------------------------------ 466 467 enum struct QSEEDVersion { 468 V1, 469 V2, 470 V3, 471 V3LITE, 472 }; 473 474 /* QSEED3 Step version */ 475 enum struct QSEEDStepVersion { 476 V2, 477 V3, 478 V4, 479 V3LITE_V4, 480 V3LITE_V5, 481 }; 482 483 enum struct SmartDMARevision { 484 V1, 485 V2, 486 V2p5 487 }; 488 489 /* Inline Rotation version */ 490 enum struct InlineRotationVersion { 491 kInlineRotationNone, 492 kInlineRotationV1, 493 kInlineRotationV2, 494 }; 495 496 /* Per CRTC Resource Info*/ 497 struct DRMCrtcInfo { 498 bool has_src_split; 499 bool has_hdr; 500 uint32_t max_blend_stages; 501 uint32_t max_solidfill_stages; 502 QSEEDVersion qseed_version; 503 SmartDMARevision smart_dma_rev; 504 float ib_fudge_factor; 505 float clk_fudge_factor; 506 uint32_t dest_scale_prefill_lines; 507 uint32_t undersized_prefill_lines; 508 uint32_t macrotile_prefill_lines; 509 uint32_t nv12_prefill_lines; 510 uint32_t linear_prefill_lines; 511 uint32_t downscale_prefill_lines; 512 uint32_t extra_prefill_lines; 513 uint32_t amortized_threshold; 514 uint64_t max_bandwidth_low; 515 uint64_t max_bandwidth_high; 516 uint32_t max_sde_clk; 517 CompRatioMap comp_ratio_rt_map; 518 CompRatioMap comp_ratio_nrt_map; 519 uint32_t hw_version; 520 uint32_t dest_scaler_count = 0; 521 uint32_t max_dest_scaler_input_width = 0; 522 uint32_t max_dest_scaler_output_width = 0; 523 uint32_t max_dest_scale_up = 1; 524 uint32_t min_prefill_lines = 0; 525 int secure_disp_blend_stage = -1; 526 bool concurrent_writeback = false; 527 uint32_t vig_limit_index = 0; 528 uint32_t dma_limit_index = 0; 529 uint32_t scaling_limit_index = 0; 530 uint32_t rotation_limit_index = 0; 531 uint32_t line_width_constraints_count = 0; 532 std::vector< std::pair <uint32_t, uint32_t> > line_width_limits; 533 uint32_t num_mnocports; 534 uint32_t mnoc_bus_width; 535 bool use_baselayer_for_stage = false; 536 bool has_micro_idle = false; 537 uint32_t ubwc_version = 1; 538 }; 539 540 enum struct DRMPlaneType { 541 // Has CSC and scaling capability 542 VIG = 0, 543 // Has scaling capability but no CSC 544 RGB, 545 // No scaling support 546 DMA, 547 // Supports a small dimension and doesn't use a CRTC stage 548 CURSOR, 549 MAX, 550 }; 551 552 enum struct DRMTonemapLutType { 553 DMA_1D_GC, 554 DMA_1D_IGC, 555 VIG_1D_IGC, 556 VIG_3D_GAMUT, 557 }; 558 559 struct DRMPlaneTypeInfo { 560 DRMPlaneType type; 561 uint32_t master_plane_id; 562 // FourCC format enum and modifier 563 std::vector<std::pair<uint32_t, uint64_t>> formats_supported; 564 uint32_t max_linewidth; 565 uint32_t max_scaler_linewidth; 566 uint32_t max_rotation_linewidth; // inline rotation limitation 567 uint32_t max_upscale; 568 uint32_t max_downscale; 569 uint32_t max_horizontal_deci; 570 uint32_t max_vertical_deci; 571 uint64_t max_pipe_bandwidth; 572 uint64_t max_pipe_bandwidth_high; 573 uint32_t cache_size; // cache size in bytes for inline rotation support. 574 bool has_excl_rect = false; 575 QSEEDStepVersion qseed3_version; 576 bool multirect_prop_present = false; 577 InlineRotationVersion inrot_version; // inline rotation version 578 std::vector<std::pair<uint32_t, uint64_t>> inrot_fmts_supported; 579 float true_inline_dwnscale_rt_num = 11.0; 580 float true_inline_dwnscale_rt_denom = 5.0; 581 bool inverse_pma = false; 582 uint32_t dgm_csc_version = 0; // csc used with DMA 583 std::map<DRMTonemapLutType, uint32_t> tonemap_lut_version_map = {}; 584 bool block_sec_ui = false; 585 }; 586 587 // All DRM Planes as map<Plane_id , plane_type_info> listed from highest to lowest priority 588 typedef std::vector<std::pair<uint32_t, DRMPlaneTypeInfo>> DRMPlanesInfo; 589 590 enum struct DRMTopology { 591 UNKNOWN, // To be compat with driver defs in sde_rm.h 592 SINGLE_LM, 593 SINGLE_LM_DSC, 594 DUAL_LM, 595 DUAL_LM_DSC, 596 DUAL_LM_MERGE, 597 DUAL_LM_MERGE_DSC, 598 DUAL_LM_DSCMERGE, 599 QUAD_LM_MERGE, 600 QUAD_LM_DSCMERGE, 601 QUAD_LM_MERGE_DSC, 602 PPSPLIT, 603 }; 604 605 enum struct DRMPanelMode { 606 VIDEO, 607 COMMAND, 608 }; 609 610 /* Per mode info */ 611 struct DRMModeInfo { 612 drmModeModeInfo mode; 613 DRMTopology topology; 614 // Valid only if mode is command 615 int num_roi; 616 int xstart; 617 int ystart; 618 int walign; 619 int halign; 620 int wmin; 621 int hmin; 622 bool roi_merge; 623 uint64_t bit_clk_rate; 624 uint32_t transfer_time_us; 625 }; 626 627 /* Per Connector Info*/ 628 struct DRMConnectorInfo { 629 uint32_t mmWidth; 630 uint32_t mmHeight; 631 uint32_t type; 632 uint32_t type_id; 633 std::vector<DRMModeInfo> modes; 634 std::string panel_name; 635 DRMPanelMode panel_mode; 636 bool is_primary; 637 // Valid only if DRMPanelMode is VIDEO 638 bool dynamic_fps; 639 // FourCC format enum and modifier 640 std::vector<std::pair<uint32_t, uint64_t>> formats_supported; 641 // Valid only if type is DRM_MODE_CONNECTOR_VIRTUAL 642 uint32_t max_linewidth; 643 DRMRotation panel_orientation; 644 drm_panel_hdr_properties panel_hdr_prop; 645 drm_msm_ext_hdr_properties ext_hdr_prop; 646 bool qsync_support; 647 // Connection status of this connector 648 bool is_connected; 649 bool is_wb_ubwc_supported; 650 uint32_t topology_control; 651 bool dyn_bitclk_support; 652 std::vector<uint8_t> edid; 653 uint32_t supported_colorspaces; 654 }; 655 656 // All DRM Connectors as map<Connector_id , connector_info> 657 typedef std::map<uint32_t, DRMConnectorInfo> DRMConnectorsInfo; 658 659 /* Per Encoder Info */ 660 struct DRMEncoderInfo { 661 uint32_t type; 662 }; 663 664 // All DRM Encoders as map<Encoder_id , encoder_info> 665 typedef std::map<uint32_t, DRMEncoderInfo> DRMEncodersInfo; 666 667 /* Identifier token for a display */ 668 struct DRMDisplayToken { 669 uint32_t conn_id; 670 uint32_t crtc_id; 671 uint32_t crtc_index; 672 uint32_t encoder_id; 673 uint8_t hw_port; 674 }; 675 676 enum DRMPPFeatureID { 677 kFeaturePcc, 678 kFeatureIgc, 679 kFeaturePgc, 680 kFeatureMixerGc, 681 kFeaturePaV2, 682 kFeatureDither, 683 kFeatureGamut, 684 kFeaturePADither, 685 kFeaturePAHsic, 686 kFeaturePASixZone, 687 kFeaturePAMemColSkin, 688 kFeaturePAMemColSky, 689 kFeaturePAMemColFoliage, 690 kFeaturePAMemColProt, 691 kFeatureDgmIgc, 692 kFeatureDgmGc, 693 kFeatureVigIgc, 694 kFeatureVigGamut, 695 kPPFeaturesMax, 696 }; 697 698 enum DRMPPPropType { 699 kPropEnum, 700 kPropRange, 701 kPropBlob, 702 kPropTypeMax, 703 }; 704 705 struct DRMPPFeatureInfo { 706 DRMPPFeatureID id; 707 DRMPPPropType type; 708 uint32_t version; 709 uint32_t payload_size; 710 void *payload; 711 uint32_t object_type; 712 }; 713 714 enum DRMDPPSFeatureID { 715 // Ad4 properties 716 kFeatureAd4Mode, 717 kFeatureAd4Init, 718 kFeatureAd4Cfg, 719 kFeatureAd4Input, 720 kFeatureAd4Roi, 721 kFeatureAd4Backlight, 722 kFeatureAd4Assertiveness, 723 kFeatureAd4ManualStrength, 724 // ABA properties 725 kFeatureAbaHistCtrl, 726 kFeatureAbaHistIRQ, 727 kFeatureAbaLut, 728 // BL scale properties 729 kFeatureSvBlScale, 730 kFeatureBacklightScale, 731 // Events 732 kFeaturePowerEvent, 733 kFeatureAbaHistEvent, 734 kFeatureBackLightEvent, 735 kFeatureAdAttBlEvent, 736 kFeatureLtmHistEvent, 737 kFeatureLtmWbPbEvent, 738 kFeatureLtmOffEvent, 739 // LTM properties 740 kFeatureLtm, 741 kFeatureLtmInit, 742 kFeatureLtmCfg, 743 kFeatureLtmNoiseThresh, 744 kFeatureLtmBufferCtrl, 745 kFeatureLtmQueueBuffer, 746 kFeatureLtmQueueBuffer2, 747 kFeatureLtmQueueBuffer3, 748 kFeatureLtmHistCtrl, 749 kFeatureLtmVlut, 750 // Insert features above 751 kDppsFeaturesMax, 752 }; 753 754 struct DppsFeaturePayload { 755 uint32_t object_type; 756 uint32_t feature_id; 757 uint64_t value; 758 }; 759 760 struct DRMDppsLtmBuffers { 761 uint32_t num_of_buffers; 762 uint32_t buffer_size; 763 std::array<int, LTM_BUFFER_SIZE> ion_buffer_fd; 764 std::array<int, LTM_BUFFER_SIZE> drm_fb_id; 765 std::array<void*, LTM_BUFFER_SIZE> uva; 766 int status; 767 }; 768 769 struct DRMDppsFeatureInfo { 770 DRMDPPSFeatureID id; 771 uint32_t obj_id; 772 uint32_t version; 773 uint32_t payload_size; 774 void *payload; 775 }; 776 777 enum AD4Modes { 778 kAd4Off, 779 kAd4AutoStrength, 780 kAd4Calibration, 781 kAd4Manual, 782 kAd4ModeMax, 783 }; 784 785 enum HistModes { 786 kHistDisabled, 787 kHistEnabled, 788 }; 789 790 struct DRMDppsEventInfo { 791 uint32_t object_type; 792 uint32_t event_type; 793 int drm_fd; 794 bool enable; 795 }; 796 797 enum DRMCscType { 798 kCscYuv2Rgb601L, 799 kCscYuv2Rgb601FR, 800 kCscYuv2Rgb709L, 801 kCscYuv2Rgb2020L, 802 kCscYuv2Rgb2020FR, 803 kCscTypeMax, 804 }; 805 806 struct DRMScalerLUTInfo { 807 uint32_t dir_lut_size = 0; 808 uint32_t cir_lut_size = 0; 809 uint32_t sep_lut_size = 0; 810 uint64_t dir_lut = 0; 811 uint64_t cir_lut = 0; 812 uint64_t sep_lut = 0; 813 }; 814 815 enum struct DRMSecureMode { 816 NON_SECURE, 817 SECURE, 818 NON_SECURE_DIR_TRANSLATION, 819 SECURE_DIR_TRANSLATION, 820 }; 821 822 enum struct DRMSecurityLevel { 823 SECURE_NON_SECURE, 824 SECURE_ONLY, 825 }; 826 827 enum struct DRMMultiRectMode { 828 NONE = 0, 829 PARALLEL = 1, 830 SERIAL = 2, 831 }; 832 833 enum struct DRMSSPPLayoutIndex { 834 NONE = 0, 835 LEFT = 1, 836 RIGHT = 2, 837 }; 838 839 enum struct DRMCWbCaptureMode { 840 MIXER_OUT = 0, 841 DSPP_OUT = 1, 842 }; 843 844 enum struct DRMQsyncMode { 845 NONE = 0, 846 CONTINUOUS, 847 ONESHOT, 848 }; 849 850 enum struct DRMTopologyControl { 851 NONE = 0, 852 RESERVE_LOCK = 1 << 0, 853 RESERVE_CLEAR = 1 << 1, 854 DSPP = 1 << 2, 855 DEST_SCALER = 1 << 3, 856 }; 857 858 struct DRMSolidfillStage { 859 DRMRect bounding_rect {}; 860 bool is_exclusion_rect = false; 861 uint32_t color = 0xff000000; // in 8bit argb 862 uint32_t red = 0; 863 uint32_t blue = 0; 864 uint32_t green = 0; 865 uint32_t alpha = 0xff; 866 uint32_t color_bit_depth = 0; 867 uint32_t z_order = 0; 868 uint32_t plane_alpha = 0xff; 869 }; 870 871 enum struct DRMFrameTriggerMode { 872 FRAME_DONE_WAIT_DEFAULT = 0, 873 FRAME_DONE_WAIT_SERIALIZE, 874 FRAME_DONE_WAIT_POSTED_START, 875 }; 876 877 /* DRM Color spaces exposed by the DP connector */ 878 enum struct DRMColorspace { 879 DEFAULT = 0, 880 SMPTE_170M_YCC, 881 BT709_YCC, 882 XVYCC_601, 883 XVYCC_709, 884 SYCC_601, 885 OPYCC_601, 886 OPRGB, 887 BT2020_CYCC, 888 BT2020_RGB, 889 BT2020_YCC, 890 DCI_P3_RGB_D65, 891 DCI_P3_RGB_THEATER, 892 }; 893 894 /* DRM Atomic Request Property Set. 895 * 896 * Helper class to create and populate atomic properties of DRM components 897 * when rendered in DRM atomic mode */ 898 class DRMAtomicReqInterface { 899 public: ~DRMAtomicReqInterface()900 virtual ~DRMAtomicReqInterface() {} 901 /* Perform request operation. 902 * 903 * [input]: opcode: operation code from DRMOps list. 904 * obj_id: Relevant crtc, connector, plane id 905 * var_arg: arguments for DRMOps's can differ in number and 906 * data type. Refer above DRMOps to details. 907 * [return]: Error code if the API fails, 0 on success. 908 */ 909 virtual int Perform(DRMOps opcode, uint32_t obj_id, ...) = 0; 910 911 /* 912 * Commit the params set via Perform(). Also resets the properties after commit. Needs to be 913 * called every frame. 914 * [input]: synchronous: Determines if the call should block until a h/w flip 915 * [input]: retain_planes: Retains already staged planes. Useful when not explicitly programming 916 * planes but still need the previously staged ones to not be unstaged 917 * [return]: Error code if the API fails, 0 on success. 918 */ 919 virtual int Commit(bool synchronous, bool retain_planes) = 0; 920 921 /* 922 * Validate the params set via Perform(). 923 * [return]: Error code if the API fails, 0 on success. 924 */ 925 virtual int Validate() = 0; 926 }; 927 928 class DRMManagerInterface; 929 930 /* Populates a singleton instance of DRMManager */ 931 typedef int (*GetDRMManager)(int fd, DRMManagerInterface **intf); 932 933 /* Destroy DRMManager instance */ 934 typedef int (*DestroyDRMManager)(); 935 936 /* 937 * DRM Manager Interface - Any class which plans to implement helper function for vendor 938 * specific DRM driver implementation must implement the below interface routines to work 939 * with SDM. 940 */ 941 942 class DRMManagerInterface { 943 public: ~DRMManagerInterface()944 virtual ~DRMManagerInterface() {} 945 946 /* 947 * Since SDM completely manages the planes. GetPlanesInfo will provide all 948 * the plane information. 949 * [output]: DRMPlanesInfo: Resource Info for planes. 950 */ 951 virtual void GetPlanesInfo(DRMPlanesInfo *info) = 0; 952 953 /* 954 * Will provide all the information of a selected crtc. 955 * [input]: Use crtc id 0 to obtain system wide info 956 * [output]: DRMCrtcInfo: Resource Info for the given CRTC id. 957 * [return]: 0 on success, a negative error value otherwise. 958 */ 959 virtual int GetCrtcInfo(uint32_t crtc_id, DRMCrtcInfo *info) = 0; 960 961 /* 962 * Will provide all the information of a selected connector. 963 * [output]: DRMConnectorInfo: Resource Info for the given connector id 964 * [return]: 0 on success, a negative error value otherwise. 965 */ 966 virtual int GetConnectorInfo(uint32_t conn_id, DRMConnectorInfo *info) = 0; 967 968 /* 969 * Provides information on all connectors. 970 * [output]: DRMConnectorsInfo: Resource info for connectors. 971 * [return]: 0 on success, a negative error value otherwise. 972 */ 973 virtual int GetConnectorsInfo(DRMConnectorsInfo *info) = 0; 974 975 /* 976 * Provides information on a selected encoder. 977 * [output]: DRMEncoderInfo: Resource info for the given encoder id. 978 * [return]: 0 on success, a negative error value otherwise. 979 */ 980 virtual int GetEncoderInfo(uint32_t encoder_id, DRMEncoderInfo *info) = 0; 981 982 /* 983 * Provides information on all encoders. 984 * [output]: DRMEncodersInfo: Resource info for encoders. 985 * [return]: 0 on success, a negative error value otherwise. 986 */ 987 virtual int GetEncodersInfo(DRMEncodersInfo *info) = 0; 988 989 /* 990 * Will query post propcessing feature info of a CRTC. 991 * [output]: DRMPPFeatureInfo: CRTC post processing feature info 992 */ 993 virtual void GetCrtcPPInfo(uint32_t crtc_id, DRMPPFeatureInfo *info) = 0; 994 995 /* 996 * Register a logical display to receive a token. 997 * Each display pipeline in DRM is identified by its CRTC and Connector(s). On display connect 998 * (bootup or hotplug), clients should invoke this interface to establish the pipeline for the 999 * display and should get a DisplayToken populated with crtc, encoder and connnector(s) id's. Here 1000 * onwards, Client should use this token to represent the display for any Perform operations if 1001 * needed. 1002 * 1003 * [input]: disp_type - Peripheral / TV / Virtual 1004 * [output]: DRMDisplayToken - CRTC and Connector IDs for the display. 1005 * [return]: 0 on success, a negative error value otherwise. 1006 */ 1007 virtual int RegisterDisplay(DRMDisplayType disp_type, DRMDisplayToken *tok) = 0; 1008 1009 /* 1010 * Register a logical display to receive a token. 1011 * Each display pipeline in DRM is identified by its CRTC and Connector(s). On display connect 1012 * (bootup or hotplug), clients should invoke this interface to establish the pipeline for the 1013 * display and should get a DisplayToken populated with crtc, encoder and connnector(s) id's. Here 1014 * onwards, Client should use this token to represent the display for any Perform operations if 1015 * needed. 1016 * 1017 * [input]: display_id - Connector ID 1018 * [output]: DRMDisplayToken - CRTC and Connector id's for the display. 1019 * [return]: 0 on success, a negative error value otherwise. 1020 */ 1021 virtual int RegisterDisplay(int32_t display_id, DRMDisplayToken *token) = 0; 1022 1023 /* Client should invoke this interface on display disconnect. 1024 * [input]: DRMDisplayToken - identifier for the display. 1025 */ 1026 virtual void UnregisterDisplay(DRMDisplayToken *token) = 0; 1027 1028 /* 1029 * Creates and returns an instance of DRMAtomicReqInterface corresponding to a display token 1030 * returned as part of RegisterDisplay API. Needs to be called per display. 1031 * [input]: DRMDisplayToken that identifies a display pipeline 1032 * [output]: Pointer to an instance of DRMAtomicReqInterface. 1033 * [return]: Error code if the API fails, 0 on success. 1034 */ 1035 virtual int CreateAtomicReq(const DRMDisplayToken &token, DRMAtomicReqInterface **intf) = 0; 1036 1037 /* 1038 * Destroys the instance of DRMAtomicReqInterface 1039 * [input]: Pointer to a DRMAtomicReqInterface 1040 * [return]: Error code if the API fails, 0 on success. 1041 */ 1042 virtual int DestroyAtomicReq(DRMAtomicReqInterface *intf) = 0; 1043 1044 /* 1045 * Sets the global scaler LUT 1046 * [input]: LUT Info 1047 * [return]: Error code if the API fails, 0 on success. 1048 */ 1049 virtual int SetScalerLUT(const DRMScalerLUTInfo &lut_info) = 0; 1050 1051 /* 1052 * Unsets the global scaler LUT 1053 * [input]: None 1054 * [return]: Error code if the API fails, 0 on success. 1055 */ 1056 virtual int UnsetScalerLUT() = 0; 1057 1058 /* 1059 * Get the DPPS feature info 1060 * [input]: Dpps feature id, info->id 1061 * [output]: Dpps feature version, info->version 1062 */ 1063 virtual void GetDppsFeatureInfo(DRMDppsFeatureInfo *info) = 0; 1064 }; 1065 1066 } // namespace sde_drm 1067 #endif // __DRM_INTERFACE_H__ 1068