34 static Reg GetDwarfCoreReg(InstructionSet isa, int machine_reg) {  in GetDwarfCoreReg()  argument
35   switch (isa) {  in GetDwarfCoreReg()
53 static Reg GetDwarfFpReg(InstructionSet isa, int machine_reg) {  in GetDwarfFpReg()  argument
54   switch (isa) {  in GetDwarfFpReg()
92     InstructionSet isa) {  in GetVariableLocations()  argument
110     const uint32_t pc_offset = stack_map.GetNativePcOffset(isa);  in GetVariableLocations()
178                                InstructionSet isa,  in WriteDebugLocEntry()  argument
195       isa);  in WriteDebugLocEntry()
200   const bool is64bit = Is64BitInstructionSet(isa);  in WriteDebugLocEntry()
221         expr.WriteOpReg(GetDwarfCoreReg(isa, value).num());  in WriteDebugLocEntry()
227         if ((isa == InstructionSet::kArm || isa == InstructionSet::kThumb2) &&  in WriteDebugLocEntry()
234         expr.WriteOpReg(GetDwarfFpReg(isa, value).num());  in WriteDebugLocEntry()