867 void Riscv64Assembler::Csrrwi(XRegister rd, uint32_t csr, uint32_t uimm5) {  in Csrrwi()  argument
869   EmitI(ToInt12(csr), uimm5, 0x5, rd, 0x73);  in Csrrwi()
872 void Riscv64Assembler::Csrrsi(XRegister rd, uint32_t csr, uint32_t uimm5) {  in Csrrsi()  argument
874   EmitI(ToInt12(csr), uimm5, 0x6, rd, 0x73);  in Csrrsi()
877 void Riscv64Assembler::Csrrci(XRegister rd, uint32_t csr, uint32_t uimm5) {  in Csrrci()  argument
879   EmitI(ToInt12(csr), uimm5, 0x7, rd, 0x73);  in Csrrci()
3980 void Riscv64Assembler::VRgather_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) {  in VRgather_vi()  argument
3985   EmitR(funct7, vs2, uimm5, enum_cast<uint32_t>(VAIEncoding::kOPIVI), vd, 0x57);  in VRgather_vi()
3996 void Riscv64Assembler::VSlideup_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) {  in VSlideup_vi()  argument
4001   EmitR(funct7, vs2, uimm5, enum_cast<uint32_t>(VAIEncoding::kOPIVI), vd, 0x57);  in VSlideup_vi()
4021 void Riscv64Assembler::VSlidedown_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) {  in VSlidedown_vi()  argument
4025   EmitR(funct7, vs2, uimm5, enum_cast<uint32_t>(VAIEncoding::kOPIVI), vd, 0x57);  in VSlidedown_vi()
4422 void Riscv64Assembler::VSll_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) {  in VSll_vi()  argument
4426   EmitR(funct7, vs2, uimm5, enum_cast<uint32_t>(VAIEncoding::kOPIVI), vd, 0x57);  in VSll_vi()
4491 void Riscv64Assembler::VSrl_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) {  in VSrl_vi()  argument
4495   EmitR(funct7, vs2, uimm5, enum_cast<uint32_t>(VAIEncoding::kOPIVI), vd, 0x57);  in VSrl_vi()
4512 void Riscv64Assembler::VSra_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) {  in VSra_vi()  argument
4516   EmitR(funct7, vs2, uimm5, enum_cast<uint32_t>(VAIEncoding::kOPIVI), vd, 0x57);  in VSra_vi()
4533 void Riscv64Assembler::VSsrl_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) {  in VSsrl_vi()  argument
4537   EmitR(funct7, vs2, uimm5, enum_cast<uint32_t>(VAIEncoding::kOPIVI), vd, 0x57);  in VSsrl_vi()
4554 void Riscv64Assembler::VSsra_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) {  in VSsra_vi()  argument
4558   EmitR(funct7, vs2, uimm5, enum_cast<uint32_t>(VAIEncoding::kOPIVI), vd, 0x57);  in VSsra_vi()
4575 void Riscv64Assembler::VNsrl_wi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) {  in VNsrl_wi()  argument
4579   EmitR(funct7, vs2, uimm5, enum_cast<uint32_t>(VAIEncoding::kOPIVI), vd, 0x57);  in VNsrl_wi()
4601 void Riscv64Assembler::VNsra_wi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) {  in VNsra_wi()  argument
4605   EmitR(funct7, vs2, uimm5, enum_cast<uint32_t>(VAIEncoding::kOPIVI), vd, 0x57);  in VNsra_wi()
4622 void Riscv64Assembler::VNclipu_wi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) {  in VNclipu_wi()  argument
4626   EmitR(funct7, vs2, uimm5, enum_cast<uint32_t>(VAIEncoding::kOPIVI), vd, 0x57);  in VNclipu_wi()
4643 void Riscv64Assembler::VNclip_wi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) {  in VNclip_wi()  argument
4647   EmitR(funct7, vs2, uimm5, enum_cast<uint32_t>(VAIEncoding::kOPIVI), vd, 0x57);  in VNclip_wi()
6299 void Riscv64Assembler::Csrwi(uint32_t csr, uint32_t uimm5) {  in Csrwi()  argument
6300   Csrrwi(Zero, csr, uimm5);  in Csrwi()
6303 void Riscv64Assembler::Csrsi(uint32_t csr, uint32_t uimm5) {  in Csrsi()  argument
6304   Csrrsi(Zero, csr, uimm5);  in Csrsi()
6307 void Riscv64Assembler::Csrci(uint32_t csr, uint32_t uimm5) {  in Csrci()  argument
6308   Csrrci(Zero, csr, uimm5);  in Csrci()