Lines Matching refs:dst
444 void movq(CpuRegister dst, const Immediate& src);
445 void movl(CpuRegister dst, const Immediate& src);
446 void movq(CpuRegister dst, CpuRegister src);
447 void movl(CpuRegister dst, CpuRegister src);
449 void movntl(const Address& dst, CpuRegister src);
450 void movntq(const Address& dst, CpuRegister src);
452 void movq(CpuRegister dst, const Address& src);
453 void movl(CpuRegister dst, const Address& src);
454 void movq(const Address& dst, CpuRegister src);
455 void movq(const Address& dst, const Immediate& imm);
456 void movl(const Address& dst, CpuRegister src);
457 void movl(const Address& dst, const Immediate& imm);
459 void cmov(Condition c, CpuRegister dst, CpuRegister src); // This is the 64b version.
460 void cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit);
461 void cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit);
463 void movzxb(CpuRegister dst, CpuRegister src);
464 void movzxb(CpuRegister dst, const Address& src);
465 void movsxb(CpuRegister dst, CpuRegister src);
466 void movsxb(CpuRegister dst, const Address& src);
467 void movb(CpuRegister dst, const Address& src);
468 void movb(const Address& dst, CpuRegister src);
469 void movb(const Address& dst, const Immediate& imm);
471 void movzxw(CpuRegister dst, CpuRegister src);
472 void movzxw(CpuRegister dst, const Address& src);
473 void movsxw(CpuRegister dst, CpuRegister src);
474 void movsxw(CpuRegister dst, const Address& src);
475 void movw(CpuRegister dst, const Address& src);
476 void movw(const Address& dst, CpuRegister src);
477 void movw(const Address& dst, const Immediate& imm);
479 void leaq(CpuRegister dst, const Address& src);
480 void leal(CpuRegister dst, const Address& src);
482 void movaps(XmmRegister dst, XmmRegister src); // move
483 void movaps(XmmRegister dst, const Address& src); // load aligned
484 void movups(XmmRegister dst, const Address& src); // load unaligned
485 void movaps(const Address& dst, XmmRegister src); // store aligned
486 void movups(const Address& dst, XmmRegister src); // store unaligned
488 void vmovaps(XmmRegister dst, XmmRegister src); // move
489 void vmovaps(XmmRegister dst, const Address& src); // load aligned
490 void vmovaps(const Address& dst, XmmRegister src); // store aligned
491 void vmovups(XmmRegister dst, const Address& src); // load unaligned
492 void vmovups(const Address& dst, XmmRegister src); // store unaligned
494 void movss(XmmRegister dst, const Address& src);
495 void movss(const Address& dst, XmmRegister src);
496 void movss(XmmRegister dst, XmmRegister src);
498 void movsxd(CpuRegister dst, CpuRegister src);
499 void movsxd(CpuRegister dst, const Address& src);
501 void movd(XmmRegister dst, CpuRegister src); // Note: this is the r64 version, formally movq.
502 void movd(CpuRegister dst, XmmRegister src); // Note: this is the r64 version, formally movq.
503 void movd(XmmRegister dst, CpuRegister src, bool is64bit);
504 void movd(CpuRegister dst, XmmRegister src, bool is64bit);
506 void addss(XmmRegister dst, XmmRegister src);
507 void addss(XmmRegister dst, const Address& src);
508 void subss(XmmRegister dst, XmmRegister src);
509 void subss(XmmRegister dst, const Address& src);
510 void mulss(XmmRegister dst, XmmRegister src);
511 void mulss(XmmRegister dst, const Address& src);
512 void divss(XmmRegister dst, XmmRegister src);
513 void divss(XmmRegister dst, const Address& src);
515 void addps(XmmRegister dst, XmmRegister src); // no addr variant (for now)
516 void subps(XmmRegister dst, XmmRegister src);
517 void mulps(XmmRegister dst, XmmRegister src);
518 void divps(XmmRegister dst, XmmRegister src);
520 void vmulps(XmmRegister dst, XmmRegister src1, XmmRegister src2);
521 void vmulpd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
522 void vdivps(XmmRegister dst, XmmRegister src1, XmmRegister src2);
523 void vdivpd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
525 void vaddps(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
526 void vsubps(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
527 void vsubpd(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
528 void vaddpd(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
533 void movapd(XmmRegister dst, XmmRegister src); // move
534 void movapd(XmmRegister dst, const Address& src); // load aligned
535 void movupd(XmmRegister dst, const Address& src); // load unaligned
536 void movapd(const Address& dst, XmmRegister src); // store aligned
537 void movupd(const Address& dst, XmmRegister src); // store unaligned
539 void vmovapd(XmmRegister dst, XmmRegister src); // move
540 void vmovapd(XmmRegister dst, const Address& src); // load aligned
541 void vmovapd(const Address& dst, XmmRegister src); // store aligned
542 void vmovupd(XmmRegister dst, const Address& src); // load unaligned
543 void vmovupd(const Address& dst, XmmRegister src); // store unaligned
545 void movsd(XmmRegister dst, const Address& src);
546 void movsd(const Address& dst, XmmRegister src);
547 void movsd(XmmRegister dst, XmmRegister src);
549 void addsd(XmmRegister dst, XmmRegister src);
550 void addsd(XmmRegister dst, const Address& src);
551 void subsd(XmmRegister dst, XmmRegister src);
552 void subsd(XmmRegister dst, const Address& src);
553 void mulsd(XmmRegister dst, XmmRegister src);
554 void mulsd(XmmRegister dst, const Address& src);
555 void divsd(XmmRegister dst, XmmRegister src);
556 void divsd(XmmRegister dst, const Address& src);
558 void addpd(XmmRegister dst, XmmRegister src); // no addr variant (for now)
559 void subpd(XmmRegister dst, XmmRegister src);
560 void mulpd(XmmRegister dst, XmmRegister src);
561 void divpd(XmmRegister dst, XmmRegister src);
563 void movdqa(XmmRegister dst, XmmRegister src); // move
564 void movdqa(XmmRegister dst, const Address& src); // load aligned
565 void movdqu(XmmRegister dst, const Address& src); // load unaligned
566 void movdqa(const Address& dst, XmmRegister src); // store aligned
567 void movdqu(const Address& dst, XmmRegister src); // store unaligned
569 void vmovdqa(XmmRegister dst, XmmRegister src); // move
570 void vmovdqa(XmmRegister dst, const Address& src); // load aligned
571 void vmovdqa(const Address& dst, XmmRegister src); // store aligned
572 void vmovdqu(XmmRegister dst, const Address& src); // load unaligned
573 void vmovdqu(const Address& dst, XmmRegister src); // store unaligned
575 void paddb(XmmRegister dst, XmmRegister src); // no addr variant (for now)
576 void psubb(XmmRegister dst, XmmRegister src);
578 void vpaddb(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
579 void vpaddw(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
581 void paddw(XmmRegister dst, XmmRegister src);
582 void psubw(XmmRegister dst, XmmRegister src);
583 void pmullw(XmmRegister dst, XmmRegister src);
584 void vpmullw(XmmRegister dst, XmmRegister src1, XmmRegister src2);
586 void vpsubb(XmmRegister dst, XmmRegister src1, XmmRegister src2);
587 void vpsubw(XmmRegister dst, XmmRegister src1, XmmRegister src2);
588 void vpsubd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
590 void paddd(XmmRegister dst, XmmRegister src);
591 void psubd(XmmRegister dst, XmmRegister src);
592 void pmulld(XmmRegister dst, XmmRegister src);
593 void vpmulld(XmmRegister dst, XmmRegister src1, XmmRegister src2);
595 void vpaddd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
597 void paddq(XmmRegister dst, XmmRegister src);
598 void psubq(XmmRegister dst, XmmRegister src);
600 void vpaddq(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
601 void vpsubq(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
603 void paddusb(XmmRegister dst, XmmRegister src);
604 void paddsb(XmmRegister dst, XmmRegister src);
605 void paddusw(XmmRegister dst, XmmRegister src);
606 void paddsw(XmmRegister dst, XmmRegister src);
607 void psubusb(XmmRegister dst, XmmRegister src);
608 void psubsb(XmmRegister dst, XmmRegister src);
609 void psubusw(XmmRegister dst, XmmRegister src);
610 void psubsw(XmmRegister dst, XmmRegister src);
612 void cvtsi2ss(XmmRegister dst, CpuRegister src); // Note: this is the r/m32 version.
613 void cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit);
614 void cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit);
615 void cvtsi2sd(XmmRegister dst, CpuRegister src); // Note: this is the r/m32 version.
616 void cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit);
617 void cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit);
619 void cvtss2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
620 void cvtss2sd(XmmRegister dst, XmmRegister src);
621 void cvtss2sd(XmmRegister dst, const Address& src);
623 void cvtsd2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
624 void cvtsd2ss(XmmRegister dst, XmmRegister src);
625 void cvtsd2ss(XmmRegister dst, const Address& src);
627 void cvttss2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
628 void cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit);
629 void cvttsd2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
630 void cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit);
632 void cvtdq2ps(XmmRegister dst, XmmRegister src);
633 void cvtdq2pd(XmmRegister dst, XmmRegister src);
644 void roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm);
645 void roundss(XmmRegister dst, XmmRegister src, const Immediate& imm);
647 void sqrtsd(XmmRegister dst, XmmRegister src);
648 void sqrtss(XmmRegister dst, XmmRegister src);
650 void xorpd(XmmRegister dst, const Address& src);
651 void xorpd(XmmRegister dst, XmmRegister src);
652 void xorps(XmmRegister dst, const Address& src);
653 void xorps(XmmRegister dst, XmmRegister src);
654 void pxor(XmmRegister dst, XmmRegister src); // no addr variant (for now)
655 void vpxor(XmmRegister dst, XmmRegister src1, XmmRegister src2);
656 void vxorps(XmmRegister dst, XmmRegister src1, XmmRegister src2);
657 void vxorpd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
659 void andpd(XmmRegister dst, const Address& src);
660 void andpd(XmmRegister dst, XmmRegister src);
661 void andps(XmmRegister dst, XmmRegister src); // no addr variant (for now)
662 void pand(XmmRegister dst, XmmRegister src);
663 void vpand(XmmRegister dst, XmmRegister src1, XmmRegister src2);
664 void vandps(XmmRegister dst, XmmRegister src1, XmmRegister src2);
665 void vandpd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
667 void andn(CpuRegister dst, CpuRegister src1, CpuRegister src2);
668 void andnpd(XmmRegister dst, XmmRegister src); // no addr variant (for now)
669 void andnps(XmmRegister dst, XmmRegister src);
670 void pandn(XmmRegister dst, XmmRegister src);
671 void vpandn(XmmRegister dst, XmmRegister src1, XmmRegister src2);
672 void vandnps(XmmRegister dst, XmmRegister src1, XmmRegister src2);
673 void vandnpd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
675 void orpd(XmmRegister dst, XmmRegister src); // no addr variant (for now)
676 void orps(XmmRegister dst, XmmRegister src);
677 void por(XmmRegister dst, XmmRegister src);
678 void vpor(XmmRegister dst, XmmRegister src1, XmmRegister src2);
679 void vorps(XmmRegister dst, XmmRegister src1, XmmRegister src2);
680 void vorpd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
682 void pavgb(XmmRegister dst, XmmRegister src); // no addr variant (for now)
683 void pavgw(XmmRegister dst, XmmRegister src);
684 void psadbw(XmmRegister dst, XmmRegister src);
685 void pmaddwd(XmmRegister dst, XmmRegister src);
686 void vpmaddwd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
687 void phaddw(XmmRegister dst, XmmRegister src);
688 void phaddd(XmmRegister dst, XmmRegister src);
689 void haddps(XmmRegister dst, XmmRegister src);
690 void haddpd(XmmRegister dst, XmmRegister src);
691 void phsubw(XmmRegister dst, XmmRegister src);
692 void phsubd(XmmRegister dst, XmmRegister src);
693 void hsubps(XmmRegister dst, XmmRegister src);
694 void hsubpd(XmmRegister dst, XmmRegister src);
696 void pminsb(XmmRegister dst, XmmRegister src); // no addr variant (for now)
697 void pmaxsb(XmmRegister dst, XmmRegister src);
698 void pminsw(XmmRegister dst, XmmRegister src);
699 void pmaxsw(XmmRegister dst, XmmRegister src);
700 void pminsd(XmmRegister dst, XmmRegister src);
701 void pmaxsd(XmmRegister dst, XmmRegister src);
703 void pminub(XmmRegister dst, XmmRegister src); // no addr variant (for now)
704 void pmaxub(XmmRegister dst, XmmRegister src);
705 void pminuw(XmmRegister dst, XmmRegister src);
706 void pmaxuw(XmmRegister dst, XmmRegister src);
707 void pminud(XmmRegister dst, XmmRegister src);
708 void pmaxud(XmmRegister dst, XmmRegister src);
710 void minps(XmmRegister dst, XmmRegister src); // no addr variant (for now)
711 void maxps(XmmRegister dst, XmmRegister src);
712 void minpd(XmmRegister dst, XmmRegister src);
713 void maxpd(XmmRegister dst, XmmRegister src);
715 void pcmpeqb(XmmRegister dst, XmmRegister src);
716 void pcmpeqw(XmmRegister dst, XmmRegister src);
717 void pcmpeqd(XmmRegister dst, XmmRegister src);
718 void pcmpeqq(XmmRegister dst, XmmRegister src);
720 void pcmpgtb(XmmRegister dst, XmmRegister src);
721 void pcmpgtw(XmmRegister dst, XmmRegister src);
722 void pcmpgtd(XmmRegister dst, XmmRegister src);
723 void pcmpgtq(XmmRegister dst, XmmRegister src); // SSE4.2
725 void shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm);
726 void shufps(XmmRegister dst, XmmRegister src, const Immediate& imm);
727 void pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm);
729 void punpcklbw(XmmRegister dst, XmmRegister src);
730 void punpcklwd(XmmRegister dst, XmmRegister src);
731 void punpckldq(XmmRegister dst, XmmRegister src);
732 void punpcklqdq(XmmRegister dst, XmmRegister src);
734 void punpckhbw(XmmRegister dst, XmmRegister src);
735 void punpckhwd(XmmRegister dst, XmmRegister src);
736 void punpckhdq(XmmRegister dst, XmmRegister src);
737 void punpckhqdq(XmmRegister dst, XmmRegister src);
753 void fstps(const Address& dst);
754 void fsts(const Address& dst);
757 void fstpl(const Address& dst);
758 void fstl(const Address& dst);
764 void fnstcw(const Address& dst);
767 void fistpl(const Address& dst);
768 void fistps(const Address& dst);
780 void xchgb(CpuRegister dst, CpuRegister src);
783 void xchgw(CpuRegister dst, CpuRegister src);
786 void xchgl(CpuRegister dst, CpuRegister src);
789 void xchgq(CpuRegister dst, CpuRegister src);
792 void xaddb(CpuRegister dst, CpuRegister src);
795 void xaddw(CpuRegister dst, CpuRegister src);
798 void xaddl(CpuRegister dst, CpuRegister src);
801 void xaddq(CpuRegister dst, CpuRegister src);
828 void andl(CpuRegister dst, const Immediate& imm);
829 void andl(CpuRegister dst, CpuRegister src);
831 void andq(CpuRegister dst, const Immediate& imm);
832 void andq(CpuRegister dst, CpuRegister src);
836 void orl(CpuRegister dst, const Immediate& imm);
837 void orl(CpuRegister dst, CpuRegister src);
839 void orq(CpuRegister dst, CpuRegister src);
840 void orq(CpuRegister dst, const Immediate& imm);
843 void xorl(CpuRegister dst, CpuRegister src);
844 void xorl(CpuRegister dst, const Immediate& imm);
846 void xorq(CpuRegister dst, const Immediate& imm);
847 void xorq(CpuRegister dst, CpuRegister src);
850 void addl(CpuRegister dst, CpuRegister src);
860 void addq(CpuRegister dst, CpuRegister src);
861 void addq(CpuRegister dst, const Address& address);
863 void subl(CpuRegister dst, CpuRegister src);
868 void subq(CpuRegister dst, CpuRegister src);
869 void subq(CpuRegister dst, const Address& address);
879 void imull(CpuRegister dst, CpuRegister src);
881 void imull(CpuRegister dst, CpuRegister src, const Immediate& imm);
885 void imulq(CpuRegister dst, CpuRegister src);
888 void imulq(CpuRegister dst, CpuRegister reg, const Immediate& imm);
945 void setcc(Condition condition, CpuRegister dst);
947 void bswapl(CpuRegister dst);
948 void bswapq(CpuRegister dst);
950 void bsfl(CpuRegister dst, CpuRegister src);
951 void bsfl(CpuRegister dst, const Address& src);
952 void bsfq(CpuRegister dst, CpuRegister src);
953 void bsfq(CpuRegister dst, const Address& src);
955 void blsi(CpuRegister dst, CpuRegister src); // no addr variant (for now)
956 void blsmsk(CpuRegister dst, CpuRegister src); // no addr variant (for now)
957 void blsr(CpuRegister dst, CpuRegister src); // no addr variant (for now)
959 void bsrl(CpuRegister dst, CpuRegister src);
960 void bsrl(CpuRegister dst, const Address& src);
961 void bsrq(CpuRegister dst, CpuRegister src);
962 void bsrq(CpuRegister dst, const Address& src);
964 void popcntl(CpuRegister dst, CpuRegister src);
965 void popcntl(CpuRegister dst, const Address& src);
966 void popcntq(CpuRegister dst, CpuRegister src);
967 void popcntq(CpuRegister dst, const Address& src);
998 void LoadDoubleConstant(XmmRegister dst, double value);
1140 void EmitOptionalRex32(CpuRegister dst, CpuRegister src);
1141 void EmitOptionalRex32(XmmRegister dst, XmmRegister src);
1142 void EmitOptionalRex32(CpuRegister dst, XmmRegister src);
1143 void EmitOptionalRex32(XmmRegister dst, CpuRegister src);
1145 void EmitOptionalRex32(CpuRegister dst, const Operand& operand);
1146 void EmitOptionalRex32(XmmRegister dst, const Operand& operand);
1152 void EmitRex64(CpuRegister dst, CpuRegister src);
1153 void EmitRex64(CpuRegister dst, const Operand& operand);
1154 void EmitRex64(XmmRegister dst, const Operand& operand);
1155 void EmitRex64(XmmRegister dst, CpuRegister src);
1156 void EmitRex64(CpuRegister dst, XmmRegister src);
1163 void EmitOptionalByteRegNormalizingRex32(CpuRegister dst,
1166 void EmitOptionalByteRegNormalizingRex32(CpuRegister dst, const Operand& operand);
1183 bool try_xchg_rax(CpuRegister dst,