130   bool IsRegister(CpuRegister reg) const {  in IsRegister()  argument
132         && ((encoding_[0] & 0x07) == reg.LowBits())  // Register codes match.  in IsRegister()
133         && (reg.NeedsRex() == ((rex_ & 1) != 0));  // REX.000B bits match.  in IsRegister()
196   explicit Operand(CpuRegister reg) : rex_(0), length_(0), fixup_(nullptr) { SetModRM(3, reg); }  in Operand()  argument
433   void call(CpuRegister reg);
437   void pushq(CpuRegister reg);
441   void popq(CpuRegister reg);
739   void psllw(XmmRegister reg, const Immediate& shift_count);
740   void pslld(XmmRegister reg, const Immediate& shift_count);
741   void psllq(XmmRegister reg, const Immediate& shift_count);
743   void psraw(XmmRegister reg, const Immediate& shift_count);
744   void psrad(XmmRegister reg, const Immediate& shift_count);
747   void psrlw(XmmRegister reg, const Immediate& shift_count);
748   void psrld(XmmRegister reg, const Immediate& shift_count);
749   void psrlq(XmmRegister reg, const Immediate& shift_count);
750   void psrldq(XmmRegister reg, const Immediate& shift_count);
781   void xchgb(CpuRegister reg, const Address& address);
784   void xchgw(CpuRegister reg, const Address& address);
787   void xchgl(CpuRegister reg, const Address& address);
790   void xchgq(CpuRegister reg, const Address& address);
793   void xaddb(const Address& address, CpuRegister reg);
796   void xaddw(const Address& address, CpuRegister reg);
799   void xaddl(const Address& address, CpuRegister reg);
802   void xaddq(const Address& address, CpuRegister reg);
807   void cmpl(CpuRegister reg, const Immediate& imm);
809   void cmpl(CpuRegister reg, const Address& address);
810   void cmpl(const Address& address, CpuRegister reg);
819   void testl(CpuRegister reg, const Address& address);
820   void testl(CpuRegister reg, const Immediate& imm);
823   void testq(CpuRegister reg, const Address& address);
830   void andl(CpuRegister reg, const Address& address);
833   void andq(CpuRegister reg, const Address& address);
838   void orl(CpuRegister reg, const Address& address);
841   void orq(CpuRegister reg, const Address& address);
845   void xorl(CpuRegister reg, const Address& address);
848   void xorq(CpuRegister reg, const Address& address);
851   void addl(CpuRegister reg, const Immediate& imm);
852   void addl(CpuRegister reg, const Address& address);
853   void addl(const Address& address, CpuRegister reg);
855   void addw(CpuRegister reg, const Immediate& imm);
857   void addw(const Address& address, CpuRegister reg);
859   void addq(CpuRegister reg, const Immediate& imm);
864   void subl(CpuRegister reg, const Immediate& imm);
865   void subl(CpuRegister reg, const Address& address);
867   void subq(CpuRegister reg, const Immediate& imm);
874   void idivl(CpuRegister reg);
875   void idivq(CpuRegister reg);
876   void divl(CpuRegister reg);
877   void divq(CpuRegister reg);
880   void imull(CpuRegister reg, const Immediate& imm);
882   void imull(CpuRegister reg, const Address& address);
886   void imulq(CpuRegister reg, const Immediate& imm);
887   void imulq(CpuRegister reg, const Address& address);
888   void imulq(CpuRegister dst, CpuRegister reg, const Immediate& imm);
890   void imull(CpuRegister reg);
893   void mull(CpuRegister reg);
896   void shll(CpuRegister reg, const Immediate& imm);
898   void shrl(CpuRegister reg, const Immediate& imm);
900   void sarl(CpuRegister reg, const Immediate& imm);
903   void shlq(CpuRegister reg, const Immediate& imm);
905   void shrq(CpuRegister reg, const Immediate& imm);
907   void sarq(CpuRegister reg, const Immediate& imm);
910   void negl(CpuRegister reg);
911   void negq(CpuRegister reg);
913   void notl(CpuRegister reg);
914   void notq(CpuRegister reg);
930   void jmp(CpuRegister reg);
936   void cmpxchgb(const Address& address, CpuRegister reg);
937   void cmpxchgw(const Address& address, CpuRegister reg);
938   void cmpxchgl(const Address& address, CpuRegister reg);
939   void cmpxchgq(const Address& address, CpuRegister reg);
971   void rorl(CpuRegister reg, const Immediate& imm);
973   void roll(CpuRegister reg, const Immediate& imm);
976   void rorq(CpuRegister reg, const Immediate& imm);
978   void rolq(CpuRegister reg, const Immediate& imm);
996   void AddImmediate(CpuRegister reg, const Immediate& imm);
1000   void LockCmpxchgb(const Address& address, CpuRegister reg) {  in LockCmpxchgb()  argument
1001     lock()->cmpxchgb(address, reg);  in LockCmpxchgb()
1004   void LockCmpxchgw(const Address& address, CpuRegister reg) {  in LockCmpxchgw()  argument
1010     EmitOptionalRex32(reg, address);  in LockCmpxchgw()
1013     EmitOperand(reg.LowBits(), address);  in LockCmpxchgw()
1016   void LockCmpxchgl(const Address& address, CpuRegister reg) {  in LockCmpxchgl()  argument
1017     lock()->cmpxchgl(address, reg);  in LockCmpxchgl()
1020   void LockCmpxchgq(const Address& address, CpuRegister reg) {  in LockCmpxchgq()  argument
1021     lock()->cmpxchgq(address, reg);  in LockCmpxchgq()
1024   void LockXaddb(const Address& address, CpuRegister reg) {  in LockXaddb()  argument
1025     lock()->xaddb(address, reg);  in LockXaddb()
1028   void LockXaddw(const Address& address, CpuRegister reg) {  in LockXaddw()  argument
1034     EmitOptionalRex32(reg, address);  in LockXaddw()
1037     EmitOperand(reg.LowBits(), address);  in LockXaddw()
1040   void LockXaddl(const Address& address, CpuRegister reg) {  in LockXaddl()  argument
1041     lock()->xaddl(address, reg);  in LockXaddl()
1044   void LockXaddq(const Address& address, CpuRegister reg) {  in LockXaddq()  argument
1045     lock()->xaddq(address, reg);  in LockXaddq()
1097   void PoisonHeapReference(CpuRegister reg) { negl(reg); }  in PoisonHeapReference()  argument
1099   void UnpoisonHeapReference(CpuRegister reg) { negl(reg); }  in UnpoisonHeapReference()  argument
1101   void MaybePoisonHeapReference(CpuRegister reg) {  in MaybePoisonHeapReference()  argument
1103       PoisonHeapReference(reg);  in MaybePoisonHeapReference()
1107   void MaybeUnpoisonHeapReference(CpuRegister reg) {  in MaybeUnpoisonHeapReference()  argument
1109       UnpoisonHeapReference(reg);  in MaybeUnpoisonHeapReference()
1119   void EmitRegisterOperand(uint8_t rm, uint8_t reg);
1120   void EmitXmmRegisterOperand(uint8_t rm, XmmRegister reg);
1132   void EmitGenericShift(bool wide, int rm, CpuRegister reg, const Immediate& imm);
1139   void EmitOptionalRex32(CpuRegister reg);
1150   void EmitRex64(CpuRegister reg);
1210 inline void X86_64Assembler::EmitRegisterOperand(uint8_t rm, uint8_t reg) {  in EmitRegisterOperand()  argument
1213   buffer_.Emit<uint8_t>((0xC0 | (reg & 7)) + (rm << 3));  in EmitRegisterOperand()
1216 inline void X86_64Assembler::EmitXmmRegisterOperand(uint8_t rm, XmmRegister reg) {  in EmitXmmRegisterOperand()  argument
1217   EmitRegisterOperand(rm, static_cast<uint8_t>(reg.AsFloatRegister()));  in EmitXmmRegisterOperand()