Lines Matching defs:DRMCrtcInfo

502 struct DRMCrtcInfo {  struct
503   bool has_src_split;
504   bool has_hdr;
505   uint32_t max_blend_stages;
506   uint32_t max_solidfill_stages;
507   QSEEDVersion qseed_version;
508   SmartDMARevision smart_dma_rev;
509   float ib_fudge_factor;
510   float clk_fudge_factor;
511   uint32_t dest_scale_prefill_lines;
512   uint32_t undersized_prefill_lines;
513   uint32_t macrotile_prefill_lines;
514   uint32_t nv12_prefill_lines;
515   uint32_t linear_prefill_lines;
516   uint32_t downscale_prefill_lines;
517   uint32_t extra_prefill_lines;
518   uint32_t amortized_threshold;
519   uint64_t max_bandwidth_low;
520   uint64_t max_bandwidth_high;
521   uint32_t max_sde_clk;
522   CompRatioMap comp_ratio_rt_map;
523   CompRatioMap comp_ratio_nrt_map;
524   uint32_t hw_version;
525   uint32_t dest_scaler_count = 0;
526   uint32_t max_dest_scaler_input_width = 0;
527   uint32_t max_dest_scaler_output_width = 0;
528   uint32_t max_dest_scale_up = 1;
529   uint32_t min_prefill_lines = 0;
530   int secure_disp_blend_stage = -1;
531   bool concurrent_writeback = false;
532   uint32_t vig_limit_index = 0;
533   uint32_t dma_limit_index = 0;
534   uint32_t scaling_limit_index = 0;
535   uint32_t rotation_limit_index = 0;
536   uint32_t line_width_constraints_count = 0;
537   std::vector< std::pair <uint32_t, uint32_t> > line_width_limits;
538   uint32_t num_mnocports;
539   uint32_t mnoc_bus_width;
540   bool use_baselayer_for_stage = false;
541   bool has_micro_idle = false;
542   uint32_t ubwc_version = 1;
543   uint64_t rc_total_mem_size = 0;