ELF0@@+);; c)#+ 1 ^ )#)###S   X Z ## ))##  ### ##))N N N N N N 6It doesn't support Address Base TLB pinning. 3[%s] PCIe SysMMU feature is disabled!!! 3[%02d][%02d] VPN: %#010x, PPN: %#010x, ATTR: %#010x pcie-iommu-lv2tablepcie_iommu_init&domain->pgtablelockTrying mapping on 1MiB@%#09llx that is mappedUNKNOWN FAULTEnable map once. exynos_iommu_unmap_oncepcie_iommu_tlb_invalidate_all3TLB.%d has %d way, %d set. 3%s: Failed to create kmem cache 3ent(%#llx) == faddr(%#llx)... 3>> No Valid TLB Entries Unable to register handler of irq %d PTW ACCESS FAULTPAGE FAULT&domain->lockTrying mapping on %#09llx mapped with 1MiB page3Page table base is not in a valid memory region sysmmu,no-suspendEnable TLB Pinning. falseignore-tlb-inval&data->mmu_ctrl_lockThere is NO ignore tlb inval, so set default value(0) Probe HSI%d block, PCIe VID : %d exynos_iommu_map_once&(&data->fault_notifiers)->lock3AxID: %#x, AxLEN: %#x pcie-vid-numexynos_iommu_map&data->lockInvalid QoS value %d, use default. Invalid map once value (set to default -> false) arch/arm64/include/asm/memory.h3unaligned: iova 0x%lx size 0x%zx min_pagesz 0x%x exynos_iommu_unmapport-name3------------- TLB[WAY][SET][ENTRY] ------------- 3%s: Failed(%d) to map %#zx bytes @ %#llx PCIe_CH0use-tlb-pinningtrueInvalid TLB pinning value (set to default -> false) %s: VA: 0x%llx's ref conunt is not 0 - SKIP unmap 3[%02d] VPN: %#010x, PPN: %#010x, ATTR: %#010x 3%s: Failed: size(%#zx)@%#llx is smaller than page size %#zx READ3Lv1 entry: %#010x 3PCIe SysMMU mapping Error! Fault occurred while System MMU %s is not enabled! 3System MMU has failed to access page table hsi-block-num3unaligned: iova 0x%lx pa 0x%pap sz 0x%zx min_pagesz 0x%x %s: Don't allow address + size over is section size (0x%llx + 0x%zx) %s: Duplicated Memory Allocation : PTE will be overwritten! pcie-sysmmu3From [%s], SysMMU %s %s at %#010lx (page table @ %pa) drivers/iommu/exynos-pcie-iommu.c3pgsize err: iova 0x%lx size 0x%zx unmapped 0x%zx 6Gen_pool is full!! Try dynamic alloc use-map-once3---------------------------------------------------------- 3The fault is not caused by this System MMU. WARNNING : There is NO PCIe VID!!! 3--- SBB(Second-Level Page Table Base Address Buffer --- %s: Can't alloc LV2 table! %s : LV1 entry fault! irq(%d) happened 3Please check IRQ and SFR base address. 3Page table base of driver: %pa Unable to find IRQ resource is probed. Version %d.%d.%d RESERVED6Page Table Base Address : 0x%pap 3SysMMU has %d TLBs, %d ports, %d sbb entries 3Failed to allocate lv2table gen pool Unrecoverable System MMU Fault!!Add SysMMU Page Fault Handler. 3>> No Valid SBB Entries WRITE3Lv2 entry: %#010x WARNNING : There is NO HSI block!!! L1Page Table Address : 0x%pap(phys) ACCESS FAULT3sysmmu(CP) lv2set_page: paddr: 0x%llx, size: 0x%lx, pent: 0x%x qos_rs.lockFailed to get resource info 3Try to IGNORE Page fault panic... SECURITY FAULT3PCIe SysMMU feature is disabled!!! samsung,pcie-sysmmu?#ȑUTH4mTH4`T҈$ȇhVTlH³(= TCȭt(T`H,h=(T:҈#hQaT.葐UTn1hT(ȭt(TҨ#T  ( ȓT ?!T#_( ȓ #T#_$?#@9#qCT_@*?#{OA8B qTRs*hZ` eA @I1 ) H@ *tC `ztA8B_ TOC{B#_@*$R@$*R @H߈?#{og_WO@! u@ Փ! v@ ը> S.S)R#!*55RR RR* @?@ T  @ h~S4 @  @  ՜@ ****9@$R@$R@$*R@h~S4$R$*R$R$*R$R$*R9 4OGWF_EgDoC{B#_@9Z @9ZT @ @ x{^S***5Tm**. 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0.note.gnu.property.note.Linux.rela.init.text.comment.init.plt.bss.rela.rodata.sysmmu_pm_ops.rela.altinstructions__versions__ksymtab_strings.modinfo__ksymtab_gpl__kcrctab_gpl.rela___ksymtab_gpl+pcie_iommu_tlb_invalidate_all.rela___kcrctab_gpl+pcie_iommu_tlb_invalidate_all.note.GNU-stack.llvm_addrsig.text.ftrace_trampoline.rela.data.__cfi_jt_init_module.rela.gnu.linkonce.this_module.rela__jump_table.rela__bug_table.note.gnu.build-id.rela___ksymtab+pcie_sysmmu_set_use_iocc.rela___kcrctab+pcie_sysmmu_set_use_iocc.rela.text.print_pcie_sysmmu_tlb.shstrtab.strtab__ksymtab.symtab__kcrctab.rodata.rela.ref.dataof_find_propertyalloc_lv2entrygen_pool_destroykmem_cache_destroyexynos_sysmmu_probe.__keyexynos_iommu_domain_alloc.__keyarm64_const_caps_readyof_property_read_variable_u32_arrayof_property_read_u32_indexg_last_devdump_sysmmu_tlb_port__cfi_jt_start__sysmmu_disable_nocount__sysmmu_enable_nocountmax_req_cntwrong_pf_cntpcie_sysmmu_register_fault_handler.cfi_jtexynos_sysmmu_irq.cfi_jtpcie_iommu_unmap.cfi_jtpcie_iommu_map.cfi_jtpcie_iommu_tlb_invalidate_all.cfi_jtexynos_sysmmu_resume.cfi_jtinit_module.cfi_jtpcie_sysmmu_disable.cfi_jtpcie_sysmmu_enable.cfi_jtpcie_iommu_tlb_invalidate_range.cfi_jtpcie_sysmmu_all_buff_free.cfi_jtexynos_sysmmu_probe.cfi_jtexynos_sysmmu_suspend.cfi_jtpcie_sysmmu_set_use_iocc.cfi_jtprint_pcie_sysmmu_tlb.cfi_jt__raw_spin_lock_init___ratelimitmemsetkimage_voffsetsysmmu_parse_dtvirt_to_physcpu_hwcap_keysexynos_iommu_unmap_once._rsexynos_iommu_map_once._rssysmmu_pm_ops____versions__get_free_pages_dev_errexynos_sysmmu_driveratomic_notifier_chain_registerlv2table_counteralloc_countergen_pool_alloc_algo_ownergen_pool_free_ownergen_pool_add_owner__kstrtabns_pcie_sysmmu_register_fault_handler__crc_pcie_sysmmu_register_fault_handler__kstrtab_pcie_sysmmu_register_fault_handler__ksymtab_pcie_sysmmu_register_fault_handlermemstart_addrgen_pool_has_addrexynos_sysmmu_irqplatform_get_irqdevm_request_threaded_irqstrcmpstrncmpexynos_iommu_unmap__kstrtabns_pcie_iommu_unmap__crc_pcie_iommu_unmap__kstrtab_pcie_iommu_unmap__ksymtab_pcie_iommu_unmap__kstrtabns_pcie_iommu_map__crc_pcie_iommu_map__kstrtab_pcie_iommu_map__ksymtab_pcie_iommu_map__log_write_mmio__log_post_read_mmio__log_read_mmio_dev_infoshow_fault_informationget_hw_versionfind_iovm_regionatomic_notifier_call_chainlv2table_pool__kstrtabns_pcie_iommu_tlb_invalidate_all__crc_pcie_iommu_tlb_invalidate_all__kstrtab_pcie_iommu_tlb_invalidate_all__ksymtab_pcie_iommu_tlb_invalidate_allgen_pool_avail__stack_chk_fail__cfi_check_failvabits_actual__warn_printk_raw_spin_unlock_raw_spin_lock__cfi_checksysmmu_of_matchof_property_read_string_raw_spin_lock_irqsave__tracepoint_rwmmio_writegen_pool_createkmem_cache_create__sysmmu_tlb_invalidate_raw_spin_unlock_irqrestoredump_tlb_entry_port_typeexynos_sysmmu_resumesysmmu_fault_name__cfi_jt_init_module__this_module__kstrtabns_pcie_sysmmu_disable__crc_pcie_sysmmu_disable__kstrtab_pcie_sysmmu_disable__ksymtab_pcie_sysmmu_disable__kstrtabns_pcie_sysmmu_enable__crc_pcie_sysmmu_enable__kstrtab_pcie_sysmmu_enable__ksymtab_pcie_sysmmu_enablelv2table_kmem_cache__kstrtabns_pcie_iommu_tlb_invalidate_range__crc_pcie_iommu_tlb_invalidate_range__kstrtab_pcie_iommu_tlb_invalidate_range__ksymtab_pcie_iommu_tlb_invalidate_rangelv2set_pagekfree__kstrtabns_pcie_sysmmu_all_buff_free__crc_pcie_sysmmu_all_buff_free__kstrtab_pcie_sysmmu_all_buff_free__ksymtab_pcie_sysmmu_all_buff_freekmem_cache_freeplatform_get_resourcedevm_ioremap_resourceexynos_iommu_unmap_onceexynos_iommu_map_oncedma_sync_single_for_devicekmalloc_order_traceexynos_sysmmu_probe__platform_driver_probeexynos_sysmmu_suspend__cfi_jt_endpfn_valid__tracepoint_rwmmio_post_read__tracepoint_rwmmio_readdevm_kmallocexynos_iommu_domain_allockmem_cache_allocpanic__kstrtabns_pcie_sysmmu_set_use_iocc__crc_pcie_sysmmu_set_use_iocc__kstrtab_pcie_sysmmu_set_use_iocc__ksymtab_pcie_sysmmu_set_use_iocc__kstrtabns_print_pcie_sysmmu_tlb__crc_print_pcie_sysmmu_tlb__kstrtab_print_pcie_sysmmu_tlb__ksymtab_print_pcie_sysmmu_tlbg_sysmmu_drvdata$d.299$d.199$x.99.Ltmp289$d.289.Ltmp189$d.189$x.89$d.379$x.279$d.179$x.79$d.369$x.269.Ltmp169$x.169$d.69$x.359$x.259$x.159$d.59$x.349.Ltmp249$d.249$x.149$d.49$d.339$x.239$x.139$d.39$d.329$d.229$x.129$x.29exynos_iommu_unmap_once._rs.29$x.319$d.219$x.119exynos_iommu_map_once._rs.19$d.19$d.309$x.209$x.109$d.9.Ltmp298$x.298.Ltmp198$x.198$d.98$x.288$x.188$d.88$d.378$d.278$x.178$d.78$d.368.Ltmp268__UNIQUE_ID_scmversion268$d.268$d.168$x.68$x.358.Ltmp258$x.258$x.158$x.58$x.348$x.248$d.148$x.48$x.338$x.238$d.138$x.38$x.328$x.228$d.128$d.28$d.318$x.218$d.118$d.18$x.308$d.208$d.108$d.8_note_7$d.297$d.197$x.97$d.387$d.287$d.187$x.87$d.377.Ltmp277$x.277$d.177$x.77$d.367__UNIQUE_ID_depends267$x.267$x.167$d.67$x.357$d.257$d.157$d.57$d.347$x.247$x.147$d.47$d.337.Ltmp237$d.237$x.137$d.37$d.327$d.227$x.127$x.27$x.317$d.217$x.117$d.17$d.307.Ltmp207$x.207$x.107$d.7$x.296$x.196$d.96$d.386$x.286$x.186$d.86$d.376$d.276$x.176$x.76$d.366__UNIQUE_ID_intree266$d.266.Ltmp166$d.166$x.66$x.356$x.256.Ltmp156$d.156$x.56$x.346.Ltmp246$d.246$x.146$x.46$x.336$x.236$d.136$x.36$x.326$x.226$d.126$d.26$d.316.Ltmp216$x.216$d.116$d.16$x.306$x.206$d.106$d.6$d.295.Ltmp195$d.195$x.95$d.385$d.285$d.185$x.85$d.375$x.275$d.175$d.75$d.365.Ltmp265__UNIQUE_ID_name265$x.265$x.165$d.65.Ltmp355$x.355$d.255$x.155$d.55$d.345$x.245$x.145exynos_sysmmu_probe.__key.45$d.45$d.335$d.235$x.135$d.35__UNIQUE_ID_license425$x.325$d.225$x.125$x.25$x.315$d.215$x.115$d.15$d.305$d.205$x.105$d.5$x.294$x.194exynos_iommu_domain_alloc.__key.94$d.94.Ltmp384$d.384$x.284$x.184$d.84$d.374.Ltmp274$d.274$x.174$x.74$d.364__UNIQUE_ID_vermagic264$d.264$d.164$x.64$x.354$x.254$x.154$x.54$x.344$d.244$d.144$x.44$x.334$x.234$d.134$x.34__UNIQUE_ID_description424$d.324$x.224$d.124$d.24$d.314$x.214$d.114$d.14.Ltmp304$x.304$x.204$x.104$d.4$d.393$d.293$d.193$x.93$d.383$x.283$d.183$x.83$d.373$x.273.Ltmp173$x.173$d.73$x.263$x.163$d.63$x.353$d.253$x.153$d.53$d.343.Ltmp243$x.243$x.143exynos_sysmmu_probe.__key.43$d.43$d.333$d.233$x.133$d.33__UNIQUE_ID_author423$x.323$x.223$x.123$x.23$x.313.Ltmp213$x.213$x.113$d.13$d.303.Ltmp203$d.203$x.103$d.3.Ltmp292$x.292.Ltmp192$x.192$d.92$d.382$d.282$x.182$d.82$d.372$d.272$d.172$x.72$d.362.Ltmp262$d.262$d.162$x.62.Ltmp352$x.352.Ltmp252$x.252$d.152$x.52$x.342$d.242$d.142$x.42$x.332$x.232$d.132$x.32$x.322$d.222$d.122$x.22$x.312$d.212$d.112$d.12$x.302$x.202$x.102$d.2$d.291$d.191$x.91.Ltmp381$d.381$x.281$d.181$x.81$d.371.Ltmp271$x.271$x.171$d.71$d.361$x.261$x.161$d.61$x.351$d.251$x.151$d.51.Ltmp341$d.341$x.241$x.141$d.41$d.331$d.231$x.131exynos_iommu_unmap_once._rs.31$d.31$d.321$x.221$x.121exynos_iommu_map_once._rs.21$d.21$d.311$x.211$x.111$d.11.Ltmp301$d.301$d.201$x.101$d.1$x.290$x.190$d.90$d.380$x.280$x.180$d.80$d.370$d.270$d.170$x.70$x.360$d.260$d.160$x.60$x.350$x.250$d.150$x.50$x.340.Ltmp240$d.240$d.140$x.40$x.330$x.230$d.130$x.30$x.320$x.220$d.120$d.20$x.310.Ltmp210$d.210$d.110$d.10$x.300$x.200$d.100O@H0ah8pC8 |8 xk2 (* 0>P9P=P@m`(2P@hm (@n(@o(@p3( @x(c@X(@8(%Q @ (U@( XxYs@`(H@ ( 00(/LoZz@Z@u@`("y^l$l xYx:*"=pG