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Tx*OEWD_CgB @{ƨ#_!8**qT!B@v@B*@ 5"**"B&V": @R@}S @r@ @bR   @9@@s52@ qB T )9 4>9w*!**o*! #;'@9 hx:!(@ (!Ț  _"T9(@ z@9(@Z˙B@@!*!@} S-S@@!*****@*?#{og_WO A8%C4 C {A!3*5C_>qT!*CC_:@!C#R`7!2_@!C#R`7!B_@!` 6C(CE923C9@!C#R7_!*@!5@!53R!!5**!9@!S*`5^!*^R|V@qTg_# T  @@@{y@#R`7(@RqLTZ@_kj T*!@*~@A<R~`  ~@@`7*R}Q8@ qTTR@!*cRs|`"@y@ *@!*!*!v*A8%C_ T*OIWH_GgFoE{D#_@*߈߈߈Trying mapping on 1MiB@%#09llx that is mappedPTW ACCESS FAULTpmmu3,stream_propertyexynos_iommu_map_once2From [%s], SysMMU %s %s at %#010lx (page table @ %pa) 2SysMMU has %d PTLBs(PMMU %d), %d STLBs, 1 S1L1TLB (Fault occurred!)2[%02d][%02d] VPN: %#010x, PPN: %#010x, ATTR: %#010x 2>> Invalid address detected! entry: %#lx2>> Invalid address detected! entry: %#lx ignore-tlb-invalNumber of PMMU : %d. pmmu7,default_stream3unaligned: iova 0x%lx pa 0x%pap sz 0x%zx min_pagesz 0x%x 2ASID: %d, Burst LEN: %d, AXI ID: %d, PMMU ID: %d, STREAM ID: %d 2 STLB: %#010lx, PT entry: %#010lx pmmu0,stream_property%s: VA: 0x%llx's ref conunt is not 0 - SKIP unmap Unable to find IRQ resource exynos_sysmmu_irq2------------- PTLB[WAY][SET][ENTRY] ------------- pmmu3,default_stream2------------- S1L1TLB[WAY][SET][ENTRY] ------------- Trying mapping on %#09llx mapped with 1MiB page%s : LV1 entry fault! pcie-iommu-lv2table2>> S1L1TLB mismatch detected! %s: Can't alloc LV2 table! 6Gen_pool is full!! Try dynamic alloc 3Failed to allocate lv2table gen pool 2S1L1TLB has %d way, %d set. Invalid QoS value %d, use default. There is NO ignore tlb inval, so set default value(0) truepmmu4,default_streamUNKNOWN FAULTqospmmu6,stream_propertyAdd SysMMU Page Fault handler.3unaligned: iova 0x%lx size 0x%zx min_pagesz 0x%x %s: Duplicated Memory Allocation : PTE will be overwritten! 3%s: Failed to create kmem cache Failed to get resource info 2entry addr: %lx, slpt base addr: %lx 2PCIe SysMMU Fault - VID : %d(0x%x) 2>> No Valid S1L1TLB Entries pmmu0,default_streamexynos_iommu_map2Lv2 entry: %#010x 2STLB.%d has %d way, %d set. %s WARNNING : There is NO PCIe VID!!! 3PCIe SysMMU feature is disabled!!! 2PMMU.%d PTLB.%d has %d way, %d set. %s 2>> No Valid STLB Entries pmmu5,default_stream3PCIe SysMMU mapping Error! 2Lv1 entry: %#010x 2>> No Valid PTLB Entries 2>> STLB mismatch detected! use-map-oncepmmu1,stream_propertyexynos_iommu_unmap_onceexynos_iommu_unmapFault occurred while System MMU %s is not enabled! 2Please check IRQ and SFR base address. 2AxID: %#x, AxLEN: %#x PAGE FAULTpmmu5,stream_property3sysmmu(CP) lv2set_page: paddr: 0x%llx, size: 0x%lx, pent: 0x%x 3%s: Failed: size(%#zx)@%#llx is smaller than page size %#zx %s:%d: irq(%d) happened 2System MMU has failed to access page table WARNNING : There is NO HSI block!!! 6Page Table Base Address : 0x%pap 2------------- STLB[WAY][SET][ENTRY] ------------- failed to init number of pmmu pmmu2,default_streamis probed. Version %d.%d.%d - MAX VM : %d, 36bit addr : %d 2SEC : ent(%#llx) == faddr(%#llx)... Enable map once. Unrecoverable System MMU Fault!!2>> PTLB mismatch detected! pmmu7,stream_property%s: Don't allow address + size over is section size (0x%llx + 0x%zx) Failed to parse DT falsepmmu6,default_stream6Set PCIe use IOCC flag. pcie-sysmmuREAD2Page table base of driver: %pa 6Default Stream cfg : 0x%x - %d stream properties pcie_iommu_init2Page table base is not in a valid memory region 2[%02d][%02d] TPN(PPN): %#010x, PPN: %#010x, ATTR: %#010x pcie-vid-num3[%s] PCIe SysMMU feature is disabled!!! L1Page Table Address : 0x%pap(phys) Fault occurred!Invalid map once value (set to default -> false) num_pmmupmmu4,stream_property3%s: Failed(%d) to map %#zx bytes @ %#llx 2---------------------------------------------------------- WRITE2ent(%#llx) == faddr(%#llx)... 2Try to IGNORE Page fault panic... ACCESS FAULTsysmmu,no-suspendpmmu1,default_stream2The fault is not caused by this System MMU. 2 PTLB: %#010lx, PT entry: %#010lx 2S1L1TLB: %#010lx, PT entry: %#010lx hsi-block-numfailed to get stream property, return %d pmmu2,stream_property3pgsize err: iova 0x%lx size 0x%zx unmapped 0x%zx Unable to register handler of irq %d Probe HSI%d block, PCIe VID : %d port-nameinvalid index %d is ignored. (max:%d) pcie_iommu_tlb_invalidate_allCONTEXT FAULTFailed to parse TLB property author=Kisang Lee description=Exynos PCIe SysMMU driverlicense=GPL v2vermagic=5.15.148-android14-11-g3f4e1ccba8ea-ab12065098 SMP preempt mod_unload modversions aarch64name=exynos_pcie_iommudepends=scmversion=g570670d2bc80      samsung,pcie-sysmmuLinuxLinuxexynos_pcie_iommu`module_layout zkfreeCfree_pages\j__get_free_pagesAMof_property_count_elems_of_sizeZ%strcmpof_find_property?[kof_property_read_variable_u32_array8of_property_read_u32_indexFpanic',uatomic_notifier_call_chainSRmem_sectionG iof_property_read_string__hwasan_store1_noabortSdevm_request_threaded_irqCp*platform_get_irq` devm_ioremap_resource*platform_get_resourceO\aBdevm_kmallockmem_cache_alloc:Y+gen_pool_alloc_algo_ownergen_pool_availL"lgen_pool_destroyQ,kmem_cache_destroy*__platform_driver_probeQgen_pool_add_ownergen_pool_createkmalloc_order_trace\__hwasan_store8_noabort#kkmem_cache_createdikmem_cache_freetUgen_pool_has_addrdmemsetGV__warn_printktuy_dev_errp\_raw_spin_unlock_irqrestoreתAcpu_hwcap_keys5arm64_const_caps_readyQd__kasan_check_writendma_sync_single_for_devicekimage_voffsetވmemstart_addrAjvabits_actual&__kasan_check_read$___ratelimits}=F__hwasan_load1_noabort 4_raw_spin_lock_irqsave+atomic_notifier_chain_registerL8G_dev_info__stack_chk_fail| gen_pool_free_owner4K_raw_spin_unlockd_raw_spin_lock__hwasan_store4_noabort~_printkt_A__hwasan_load4_noaborth'J__hwasan_load8_noabort1[__sanitizer_cov_trace_pcGNU+>ޠ}!<,(@GNU 8DHT`pS S ff ,0<HT\h $8E <E @LT`px,8LXDT`p(<L\h p$08Hp  (LX\hx! $(0\hlp|y y "   $ 0 < D H L #X $p        , D | %  &       U U ' 0 `  d  h $l $        L h t         (( 8 L P 8T 8` d )h )   * *   + +  ,0@Tdx,<P`t(8LP8T8`d)h)**++,-,0848@D)H)`**++,-$HPt((UU',4@H 0(U,U4DPHPP'XdtMM19908@8D8PX)\)p**++,-  $U(U81@DHP2`hxUU12 ,8DP\ht3  LL"p|%$&Xdp|xx'**,8HL  $(8,88@)D)X|****38 8))0TX*\*dtx+|+,++,- 8<8@8LT)X)h**++,-($,*0*@H)L)`++((88))<@*D*L\`+d+l,-4!00 5 $ 8 D L l t       !!!$!,!|!! !0!!!!!"' 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p S S  D G   * 0  F   x(`yp>  :  $ B(0 ( @ @"sH"8# , #  ($2  : <$ eL$k2\$$ (   $~ !a $   |%`(4 0 _< ,H   9 'ld(h Tx ; ` ;. ls;xS; ;  ;#P(l  ; I;;q <u  <_  <{  <<d <h  <R  <n   <,$<W8 (<[ D ,<E P 0<Y \4<T@ 9#@#x@J S -  -& S8 !##L #@ %  !#' ((& (bcZb?)+'+~  %()+%OT S}B2 Lu~ Uoh="H|3<0 0ji 8)As")Tax Sx@  {p#1a @u2 -ZcnNQM A)@u G6ra    rz qb.note.gnu.property.note.Linux.rela.init.text.hyp.text.rela.text.comment.init.plt.hyp.bss.rela.altinstructions__versions__ksymtab_strings.rodata.str.modinfo__ksymtab_gpl__kcrctab_gpl.rela___ksymtab_gpl+pcie_iommu_tlb_invalidate_all.rela___kcrctab_gpl+pcie_iommu_tlb_invalidate_all.note.GNU-stack.llvm_addrsig.text.ftrace_trampoline.init.eh_frame.rela.eh_frame.rela.gnu.linkonce.this_module.rela__jump_table.rela__bug_table.note.gnu.build-id.rela___ksymtab+pcie_sysmmu_set_use_iocc.rela___kcrctab+pcie_sysmmu_set_use_iocc.shstrtab.strtab__ksymtab.symtab__kcrctab.hyp.rodata.rela.rodata.hyp.data.rela.ref.data.rodata.str1.1pmmu_stream_propertyof_find_propertyalloc_lv2entrygen_pool_destroykmem_cache_destroyarm64_const_caps_readyof_property_read_variable_u32_arrayof_property_read_u32_indexg_last_dev__hwasan_store8_noabort__hwasan_load8_noabort__hwasan_store4_noabort__hwasan_load4_noabort__hwasan_store1_noabort__hwasan_load1_noabortmax_req_cntwrong_pf_cnt___ratelimitmemsetkimage_voffsetsysmmu_parse_dtcpu_hwcap_keysexynos_iommu_unmap_once._rsexynos_iommu_map_once._rssysmmu_pm_ops____versions__get_free_pages_dev_errexynos_sysmmu_driveratomic_notifier_chain_registerlv2table_counteralloc_countergen_pool_alloc_algo_ownergen_pool_free_ownergen_pool_add_owner__kstrtabns_pcie_sysmmu_add_fault_handler__crc_pcie_sysmmu_add_fault_handler__kstrtab_pcie_sysmmu_add_fault_handler__ksymtab_pcie_sysmmu_add_fault_handlermemstart_addrgen_pool_has_addrexynos_sysmmu_irqplatform_get_irqdevm_request_threaded_irqstrcmp__kstrtabns_pcie_iommu_unmap__crc_pcie_iommu_unmap__kstrtab_pcie_iommu_unmap__ksymtab_pcie_iommu_unmap__kstrtabns_pcie_iommu_map__crc_pcie_iommu_map__kstrtab_pcie_iommu_map__ksymtab_pcie_iommu_map_dev_infomem_sectionfind_iovm_regionatomic_notifier_call_chainpmmu_default_streamlv2table_pool__kstrtabns_pcie_iommu_tlb_invalidate_all__crc_pcie_iommu_tlb_invalidate_all__kstrtab_pcie_iommu_tlb_invalidate_all__ksymtab_pcie_iommu_tlb_invalidate_allgen_pool_avail__stack_chk_failvabits_actual__warn_printk_raw_spin_unlock_raw_spin_locksysmmu_of_matchof_property_read_stringof_property_count_elems_of_size_raw_spin_lock_irqsave__kasan_check_writegen_pool_createkmem_cache_create_raw_spin_unlock_irqrestoreexynos_sysmmu_resumesysmmu_fault_nameinit_module__this_module__kstrtabns_pcie_sysmmu_disable__crc_pcie_sysmmu_disable__kstrtab_pcie_sysmmu_disable__ksymtab_pcie_sysmmu_disable__kstrtabns_pcie_sysmmu_enable__crc_pcie_sysmmu_enable__kstrtab_pcie_sysmmu_enable__ksymtab_pcie_sysmmu_enablelv2table_kmem_cache__kstrtabns_pcie_iommu_tlb_invalidate_range__crc_pcie_iommu_tlb_invalidate_range__kstrtab_pcie_iommu_tlb_invalidate_range__ksymtab_pcie_iommu_tlb_invalidate_rangekfree__kstrtabns_pcie_sysmmu_all_buff_free__crc_pcie_sysmmu_all_buff_free__kstrtab_pcie_sysmmu_all_buff_free__ksymtab_pcie_sysmmu_all_buff_freekmem_cache_freeplatform_get_resourcedevm_ioremap_resourcedma_sync_single_for_devicekmalloc_order_traceexynos_sysmmu_probe__platform_driver_probeexynos_sysmmu_suspend__kasan_check_read__sanitizer_cov_trace_pcdevm_kmallocexynos_iommu_domain_allockmem_cache_allocpanic__kstrtabns_pcie_sysmmu_set_use_iocc__crc_pcie_sysmmu_set_use_iocc__kstrtab_pcie_sysmmu_set_use_iocc__ksymtab_pcie_sysmmu_set_use_iocc__kstrtabns_print_pcie_sysmmu_tlb__crc_print_pcie_sysmmu_tlb__kstrtab_print_pcie_sysmmu_tlb__ksymtab_print_pcie_sysmmu_tlbg_sysmmu_drvdata_note_9$d.99$d.89$x.79$x.69$x.59$d.149$x.49$d.139$d.39.Ltmp29$d.129$d.29$d.119$d.19$d.109$d.9_note_8$x.98$x.88.Ltmp78$d.78.Ltmp68$d.68$d.58$d.148$d.48.Ltmp38$x.138$x.38$x.128$x.28$x.118$d.18$x.108$d.8$d.97$d.87$x.77$x.67$x.57.Ltmp47$d.147$x.47$d.137$d.37$d.127$d.27$d.117$d.17$d.107$d.7$x.96$x.86__UNIQUE_ID_license476$d.76$d.66$d.156$d.56$d.146$d.46$x.136$x.36.Ltmp26$x.126$x.26$x.116$d.16$x.106$d.6$d.95.Ltmp185$x.85__UNIQUE_ID_description475$x.75.Ltmp65$x.65$d.155$x.55$x.45.Ltmp35$d.135$d.35$d.125$d.25$d.115$d.15$d.105$d.5$x.94$d.84.Ltmp74__UNIQUE_ID_author474$d.74$d.64$d.54.Ltmp44$d.144$d.44$x.134$x.34$x.124$x.24$x.114$d.14__UNIQUE_ID_scmversion304$x.104$d.4$d.93$x.83$x.73$x.63$x.53$d.143$d.43$d.133$d.33$d.123$d.23$d.113$d.13__UNIQUE_ID_depends303$d.103$d.3$x.92$d.82$d.72.Ltmp62$d.62$d.52$x.142$x.42.Ltmp32$x.132$x.32$x.122$x.22exynos_iommu_unmap_once._rs.22$x.112exynos_iommu_map_once._rs.12$d.12__UNIQUE_ID_name302$x.102$d.2$d.91$x.81.Ltmp71$x.71$x.61$x.51.Ltmp41$d.141$d.41$d.131$d.31$d.121$d.21$d.111$d.11__UNIQUE_ID_vermagic301$d.101$d.1$x.90$d.80$d.70$d.60$d.50$x.140$x.40$x.130$x.30$x.120exynos_iommu_unmap_once._rs.20$d.20$x.110exynos_iommu_map_once._rs.10$d.10$x.1006@<|<HfhHSNG0XRk_?8<:@d/@x/2Q@`h/@x/@@h/a@/@H/@8/2QC%8R  @/\0^D20^m~nzou@`/!cp^@X/#E0n@/9Lohas0t@@}@/)w@x$ )@1$:.s=z