ELF@@'%  rewa irq already enabled %s: Not supported ref clock 6%s, ref_clk = %d %29s %xssrx_lfps_th3[%s] exynos_usbdrd_get_struct error samsung,exynos-usbdrd-phyexynos_usbdrd_phy_probecouldn't read pmu_offset_tcxo on %s node, error = %d invalid clk list in %s nodetx_swing_lowcan't get compdis value, error = %d exynos_usbdrd_phy_resumelos_levelssrx_dfe_2tap_ctrl_sspssrx_dfe_5tap_ctrl_sssstx_pre_shoot_sseom timeout error Failed to lookup PMU regmap fail to request gpio %s:%d has_combo_phyfailed to read phyclk_mux name %d from %s node can't fill super speed tuning value can't get phy_refsel_diff_single, error = %d loopback test result pass_cnt = %d, fail_cnt = %d %s, is_conn = %d tx_res_ovrdssrx_dfe_3tap_ctrl_ssssrx_dfe_4tap_ctrl_sspssrx_dfe_5tap_ctrl_ssp6cmn_rate = %d [%s] REWA CANCEL exynos_usbdrd_utmi_ilbkPHY CON Selection OK It is TYPE USB3DRDuse_io_for_ovcss_tune_infousbphy info: version:0x%x, refclk:0x%x fix_rxeq_valueset_crport_mpll_charge_pumphs_phy_tunesstx_up_term%s - Couldn't create sysfs for loopback test don't need user Mux for phyclk don't need usbphy tuning value for super speed can't get phy_refsel_diff_internal, error = %d can't get tx_swing_full value, error = %d can't get ssc_range value, error = %d failed to read hs tune name from %s node tx_vrefsstx_amp_ssrext_ovrd6%s: reg000:%p, reg0001:%p REWA Disconn & Wakeup IRQ DISABLE couldn't get extcon pd-hsi0 is not powered, deferred probe!couldn't read pmu_mask_tcxo on %s node, error = %d phy_refsel_diff_padcan't get tx_hsxv value, error = %d %s hs tune cnt = %d decrese_ss_tx_imppcs_rx_los_mask_valssrx_hf_eq_rsel_ctrl_sspssrx_hf_eq_csel_ctrl_ssEXTCON_USB_HOST notifier register failed %s: Failed to get ip_type nonecan't get tx_res value, error = %d tune_name3Can't get hs_tune_cnt!!! ssrx_mf_eq_psel_ctrl_ssexynos_usbdrd_phy_link_rst6%s: +++ %s %s ip_type%s couldn't get ref_clkhs_tune_paramcan't get phy_refsel_ext_osc, error = %d enable_ssccan't get otg_tune value, error = %d ssrx_dfe_1tap_ctrl_ssp%s: extcon register failed exynos_usbdrd_usb_updateexynos_usbdrd_usb_host_updatefailed to read clocks name %d from %s node exynos_usbdrd_fill_hstune_paramfailed to read hs tune value from %s node ss_tune_cnttx_pre_emp_plusUSB PHY Conn Clear REWA wakeup/conn IRQ disable has_other_phyexynos_usbdrd_phy_wakeup_interruptcan't get vbus_pad can't get phy_refsel_xtal, error = %d tx_deemphasis_3p5dbcan't get tx_deemphasis_6db value, error = %d eom_result structure is NULL!!! rx_decode_modetx0_term_offsetssrx_dfe_1tap_ctrl_ssfailed to request irq #%d --> %d couldn't read pmu_mask on %s node, error = %d invalid phyclk list in %s node can't get sub_phy_version can't fill super speed tuning param ==== Print USB Tune Value ==== USB PHY Conn Set exynos_usbdrd_s2mpu_manual_control6%s: --- [%s] rewa sys valid set : %s couldn't get %s clock can't get tx_swing_level value, error = %d can't get tx_deemphasis_mode value, error = %d can't get fix_rxeq_value value, error = %d hs_tune_cntsstx_idrv_upIt has not the other phy couldn't read pmu_offset on %s node, error = %d pmu_mask_pllIt has not combo phy exynos_usbdrd_phyclk_getcommon_block_disablephy_refsel_xtalcan't get los_mask_val value, error = %d can't get tx_pre_emp value, error = %d %19s %xloopbacktx_eye_height_cntl_enCouldn't read phy_ref_clock %s node, error = %d %s: Failed to enable clk %s - Couldn't create sysfs for PHY EOM exynos_usbdrd_phy_conn_interruptcan't get phy refsel can't get enable_fixed_rxeq_mode value, error = %d can't get enable_user_imp value, error = %d %s : 0x%x, 0x%x tx_vboost_lvltx_risepcs_tx_swing_full_sstxREWA DISABLE Complete can't get phy_refsel_diff_pad, error = %d can't get tx_deemphasis_3p5db value, error = %d is_phyclockmpll_charge_pumpssrx_hf_eq_csel_ctrl_sspssrx_dfe_2tap_ctrl_ssphy_ref_clock%s: phy port[%d] exynos_usbdrd_pipe3_ilbkpmu_mask_tcxobufcan't get ip typefailed to get clock for DRD USBPHYeompcs_tx_deemph_6dbsstx_dn_term3%s: failed to get the platform_device use_default_tune_valFailed to create usbdrd_phy phy can't fill high speed tuning value can't get set_crport_level_en value, error = %d can't get tx_vref value, error = %d tune_valueloopback test pass, pass cnt = %d tx_fslstx_dis_incssrx_mf_eq_zsel_ctrl_ssssrx_mf_eq_zsel_ctrl_ssp6%s pmu_offset_dpphy,gpio_phy_portreverse_con_dir = %d Disconnecttx_swing_fullrx_eq_fix_valsstx_amp_sspphydrd-wakeupphyclk_muxtx_swing_levelcan't get tx_rise value, error = %d can't get tx_sqrx value, error = %d enable_user_imppcs_tx_deemph_3p5dbssrx_cdr_fbb_fine_ctrl_sspexynos_usbdrd_get_structEXTCON_USB notifier register failed It is TYPE USB2DRD3%s: failed to get the usbdrd node exynos_usbdrd_utmi_initREWA ENABLE Complete don't need usbphy tuning value for high speed can't fill high speed tuning param can't get is_phyclock value, error = %d tx_hsxvtx_vboost_lvl_sstxexynos_usbdrd_utmi_vendor_setREWA ENABLE FAIL, ret : %d %s: get cc orientation failed, ret=%d couldn't read pmu_mask_pll on %s node, error = %d &phy_drd->lockfailed to alloc : phy clocks tx_pre_empssrx_term_calVendor set by interrupt, Do not REWA cancel phy_exynos_usbdrdreverse_con_dircan't get phy_version don't need usbphy tuning param for high speed phy_refsel_diff_internaltx_deemphasis_6dbss_tune_paramphy_tuneTune value count : %d cr_lvl_ctrl_entx_resrewa irq : %d, enable: %d, cancel: %d phy_refclkhs_tune_infolos_mask_valssrx_dfe_4tap_ctrl_sssstx_lfps_idrv_upextcon%s failed to enable ref_clkcan't get tx_swing_low value, error = %d can't get set_crport_mpll_charge_pump value, error = %d can't get tx_pre_emp_puls value, error = %d sub_phy_versioncompdispipe_tx_deemph_update_delaysstx_deemp_ssexynos_usbdrd_parse_dt6%s: +++ usb2-phydrd-connpmu_offset_tcxobuf%s - Couldn't create sysfs for PHY tune can't get io_for_ovc is_not_vbus_padtx_boost_levelCan't get tune value!!! phase %d vref %d err %lu otgssrx_sqhs_th_sspssrx_adap_coef_selssrx_cdr_fbb_fine_ctrl_sp%s: Failed to get clocks samsung,pmu-sysconnon-DT: PHY CON Selection It is TYPE USB3HOSTclock-names%s ss tune cnt = %d failed to read ss tune name from %s node sstx_pre_shoot_sspREWA DISABLE FAIL, ret : %d exynos_usbdrd_pipe3_initpmu_mask = 0x%x can't get common_block_disable used_phy_portphy_refsel_clockcoreset_crport_level_enloopback test fail, fail cnt = %d los_biaseom test fail - timeout pmu_offsetcouldn't read pmu_offset_dp on %s node, error = %d %s - Couldn't create sysfs for HS PHY tune failed to read ref_clocks name from %s node exynos_rate_to_clkphy_versioncan't get phy_refsel_clockcore, error = %d phy_refsel_ext_oscUSB refsel Must be choosed tx_deemphasis_modessc_rangecan't get tx_fsls value, error = %d Failed to enable VBUS supply Request to power_off usbdrd_phy phy 3Can't get ss_tune_cnt!!! rx_sqrxtx_iboost_lvleom test fail - exit failed to get syscon base address It is TYPE USB2HOSTphy_refsel_diff_singlecan't get tx_boost_level value, error = %d can't get los_bias value, error = %d enable_fixed_rxeq_modessrx_mf_eq_psel_ctrl_sspsstx_deemp_ssp%s pmu_maskPHY_CONphy reference clock shouldn't be omittedcan't get enable_ssc value, error = %d exynos_usbdrd_fill_sstune_paramfailed to read ss tune value from %s node pcs_tx_swing_fullssrx_hf_eq_rsel_ctrl_ssssrx_dfe_3tap_ctrl_sspphy_exynos_usbdp_g2_v4_enabledrivers/phy/samsung/phy-exynos-usbdrd.cexynos_usbdrd_pipe3_vendor_setsyscon device node not found Use default tune value for SS/SSP Disablecan't get used_phy_port tx_pre_emp_pulsssrx_sqhs_th_ssXXX,<Lsamsung,exynos-usbdrd-phy D  @D  ?#ըH MToH!T(r TpH! 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(@ *1k y22 (2HA )R 2I1 Hq R+  @  *1J )22  {B#_֟$R _ @$ *R  @_ @$ R@_$R _ @$*R  @_ @$R @_$ RR _ @$RR _ @$R_$ *R@_$ R  @_ ߈(߈ ߈?#{Cog_WOh@*1@Th5`@T Փ@ *1u.2 Օ2>3 թ_(R*V?q ?IqRR()@RR @kT@qJR*8RI__q;;*`|R*(RZ7* r2*5 R  @ *r1) *6H 7R91T$R$*R$R`~SOFWE_DgCoB{A#_֟$R$*R$R$R߈߈?#{ _WO@ "@jR7rk@ TR [4(}@ Y85!@kT:1T*RAR*x*RaR*@RR*R2aR*@RR*Rr S *aR*@RR*R2aR*ODWC_B @{Ũ#_?#{Cog_WO @*** ն@ *1ݟR2   @ *1) ;2 " @ *1) 2I; 22 (R:R*:?3?3 {@q`T q`TqT4 չ@ *1G6 չ@ *19*NqT @ *12 չ2 @* NqT @ *1{2 * @ *12 չ22 $R$*R$R$*R$R$*R$R$R$R$*R$R$R$*R$R$R @ *1SOFWE_DgCoB{A#_֟$R$*R $R $R$*R$R$R$*R$ R@$R@$R$*R߈߈߈߈߈߈߈߈߈?#{C @@RRh  @  *1J )22  @{A#_֟$R@$ *R @@$ R@@ ߈?#{C @@RRh  @  *1J )y2  @{A#_֟$R@$ *R @@$ R@@ ߈?#{CO @**q h@ տqK *1I) H32h 3 @RRh h@ *1) qT2 * R * @RRt t@ *1z2 t h@ *1) OCMS{A@#_֟$R@$*R_@$R@$R$*R@$R$R$*R$R$R$*R**h߈h߈t߈h߈?#{O***aR*OA{¨#_?#{ **AR* @{¨#_?#{**aR{#_?#{*AR*{#_?#{O**RAR* t*RrR R(S*aR*OA{¨#_?#{O**RAR*h  l*R 332aR*OA{¨#_?#{*!R*{#_?#{**AR{#_?#{***{#_?#{CO @B  @  *1J )m2)2 *  @ *1) j2) 2  OB{A#_֟$R@$ *R@@$ R##@$R$*R@$ R##@ ߈߈?#{C @1 I@ տ1 * A H@ *1}`{A#_֟$R##@$ *R@@$R@$**R@@I߈H߈?#{C @q H@ տ1*}S( {A#_֟$R@$*R @H߈?#{C @q H@ տ1*US( {A#_֟$R@$*R @H߈?#{C @ h@ *1) 2 @2? rH Rh h@ *1) u22 h@{A#_֟$ՠR@$ը**R_@$R@$R$*R@$R@h߈h߈?#{C @Q  @  *1J )22  {A#_֟$R@$ *R@@$ R##@ ߈?#{C @Q  @  *1J )y2  {A#_֟$R@$ *R@@$ R##@ ߈?#{ @(A  @  *1k Jm2J2 )Q  (@ *1J u2 ({B#_֟$R @_$ *R @ @_$ R @_$R _$*R @_$R  @_ ߈(߈?#{ _WO@H* @907@a @ *1! 4!4!4!4!4!4!`4!@4!4!4!@5ARR*j@ RqR(jh @ *1 @ *1!4!4!4!4!4!`4!`4!5y&3w 3bx3w 3^x3w 3Zx3w3Vx3 w3Ry 3 w3Ny3 4 2Iy 32 2 j@ RqR(jhB @ *12 ո@ *1!`4!52w32 ճ2 2{ ճ2w 32 ճ2 2{ ճ w 3w3z w32 ODWC_B @{Ũ#_֟$R $*R$RL$*RH$RI$*RE$*R$*R$R$*R$R$*R$*R$R$R$R$Ry$Rv$Rt߈߈߈߈߈?#{ O@  @9h 07*! 4!4!`4!4!4!@4!4!4! 4!~SqZ S*S > S FSNSRSZSfShOB @{è#_?#{C @2a {A#_֟$*R@@_$A?#{C @a H@ *1) ({A#_֟$R@$*R@@H߈?#{ O @" u@ *1z2 Ոi @ *1) 2թ2 Փb  h@ *1) 777RAR1CT$R$*R@#@R!r u@ *1R r2  * Ոi @ *1) )"2Փ  Հ RR*OB @{è#_֟$R$*R$ R@$R$*R$ R@$R$*R$ R@$R$*R$R@u߈߈h߈u߈߈?#{CO @(q @ *1J 2Պ  3  t@ *1("R2Պ* (!j @ *1J 2Պ2 3a  h@ *1) 77RR1cT$R$*R @ R@ROB{A#_֟$R $*R@$ R @$R $*R@$ R @$R $*R@$ R @߈t߈߈h߈?#{CWO @ t@ *1t7*R" Ֆ@ *12 2 յb ը@ *1) 7RR1T($R$*R_| Ֆ@ *17RR1T $R$*R  t@ *1z2 *tOCWB{A#_֟$R$*R$R$*R$R$R$*R$Rt߈߈߈߈t߈?#{CO @ h@ *1) h7** h@ *1) y2 Հ RRh*OB{A#_֟$R$*R @$R$*R @$R@h߈h߈?#{C @A4  @  *1J )22  2 )CRir    @  *1J )u2)2  {A#_֟$R@$ *R@@$ R##@$ CRR`r@$R@$ *R@@$ R##@ ߈ ߈?#{C @  @  *1J )y2  {A#_֟$R@$ *R@@$ R##@ ߈?#{C@qAT?qR R(hh  @  *1J )22   RR{A#_֟$R@$ *R@@$ R##@ ߈?#{C@qaT?qR R(hh  @  *1J )u2)2   RR{A#_֟$R@$ *R@@$ R##@ ߈?#{ @QB4  @  *1J ?q R R)qj2I *     @  *1J )q2  {B#_֟$R@_$ *RA)_$ R  @_$R_$ *R@_$ R  @_ ߈ ߈?#{C @Q H@ տ1*ES( {A#_֟$R@$*R @H߈?#{ @Q  @  *1J ?q R) 2) *  {B#_֟$R@_$ *RA)_$ R  @_ ߈?#{ O @B t@ *19 (R2 * մRh Օ@ *1v22 +R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r Ո@ *1) (61T6$R$*R@+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r Ո@ *1r) *2y Օ t@ *182Ք  t @OB{è#_֟$R$*R$R$R$*R $R@ $ՠR@$*R*$**R*$*R*$R$*R**t߈߈߈߈t߈?#{ O @B t@ *19 I(R2 * մRh Օ@ *1r22 +R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r Օ@ *1u(7 R Օ@ *12ըv +R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r2ը 2 +R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r+R r Օ@ *1rHR Օ@ *1v2 Օ t@ *1H82Ք  t @OB{è#_֟$Rw$*Rs$Ru$Rs$*Ro$R@o$R$*R$*R*$*R@$ՠR@$*R*$**R*$*R*$R$*R$R@$R@$R[$*RWt߈߈߈߈߈߈t߈?#{ WO!*_1TD!4!4!`4!@4! "4!%4!'4!*4!-4!04!`34!@64! 94!`?4!E4!K4! R4!`X4!^4!d4! k4!`q4!w4!z4!`}4!4!4!4!4!4!`4!`4!4!@5b Օ@ *1j2h32 Փ7 Ֆ@ *1v32 R s@ *1n2* ճ7 Ֆ@ *1v32 R sS@ *1n2* ճ2( Ֆ@ *1v 32 ՈAR s S@ *1r2* ճgB+ Ֆ@ *1v32 ZR s@ *1^2* ճK) Ֆ@ *1v32 ՈNR s@ *1j2* ճ/) Ֆ@ *1v32 OR s@ *1j2* ճ% Ֆ@ *1v32 -R sS@ *1v2* ճ% Ֆ@ *1v32 -R sS@ *1v2* ճr) Ֆ@ *1v32 ՈKR s@ *1j2* ճ) Ֆ@ *1v32 LR s@ *1j2* ճ$ Ֆ@ *1v32 &R s@ *1v2* ճ$ Ֆ@ *1v32 Ո&R sS@ *1v2* ճkB3 ն@ *1v32 4 v@ *1hb2* R t@ *1b2* Ru Փ@ *1hb2* Փ43 ն@ *1v32 b4 v@ *1hb2* R t@ *1b2* Ru Փ@ *1hb2* ՓR3 ն@ *1v32 4 v@ *1hb2* ՈR t@ *1b2* ՈRu Փ@ *1hb2* Փ3 ն@ *1v32 r4 v@ *1hb2* ՈR t@ *1b2* ՈRu Փ@ *1hb2* Փb3 ն@ *1v32 "4 v@ *1hb2* R t@ *1b2* Ru Փ@ *1hb2* ՓX3 ն@ *1v32 4 v@ *1hb2* R t@ *1b2* Ru Փ@ *1hb2* Փ!r3 ն@ *1v32 24 v@ *1hf2* ՈR t@ *1f2* ՈRu Փ@ *1hf2* Փ3 ն@ *1v32 4 v@ *1hf2* ՈR t@ *1f2* ՈRu Փ@ *1hf2* Փ3 ն@ *1v32 B4 v@ *1hf2* R t@ *1f2* Ru Փ@ *1hf2* Փ|3 ն@ *1v32 4 v@ *132 R t@ *1f2* Ru vS@ *1f2* ՓE: Ֆ@ *1v32 ׃R s@ *1f2* ճ): Ֆ@ *1v32 Ո׃R s@ *1f2* ճ . մ@ *1v22 . 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