1 /* 2 * Copyright (C) 2014 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef ART_RUNTIME_ARCH_ARM_INSTRUCTION_SET_FEATURES_ARM_H_ 18 #define ART_RUNTIME_ARCH_ARM_INSTRUCTION_SET_FEATURES_ARM_H_ 19 20 #include "arch/instruction_set_features.h" 21 #include "base/macros.h" 22 23 namespace art HIDDEN { 24 25 class ArmInstructionSetFeatures; 26 using ArmFeaturesUniquePtr = std::unique_ptr<const ArmInstructionSetFeatures>; 27 28 // Instruction set features relevant to the ARM architecture. 29 class ArmInstructionSetFeatures final : public InstructionSetFeatures { 30 public: 31 // Process a CPU variant string like "krait" or "cortex-a15" and create InstructionSetFeatures. 32 static ArmFeaturesUniquePtr FromVariant(const std::string& variant, std::string* error_msg); 33 34 // Parse a bitmap and create an InstructionSetFeatures. 35 static ArmFeaturesUniquePtr FromBitmap(uint32_t bitmap); 36 37 // Turn C pre-processor #defines into the equivalent instruction set features. 38 static ArmFeaturesUniquePtr FromCppDefines(); 39 40 // Process /proc/cpuinfo and use kRuntimeISA to produce InstructionSetFeatures. 41 static ArmFeaturesUniquePtr FromCpuInfo(); 42 43 // Process the auxiliary vector AT_HWCAP entry and use kRuntimeISA to produce 44 // InstructionSetFeatures. 45 static ArmFeaturesUniquePtr FromHwcap(); 46 47 // Use assembly tests of the current runtime (ie kRuntimeISA) to determine the 48 // InstructionSetFeatures. This works around kernel bugs in AT_HWCAP and /proc/cpuinfo. 49 static ArmFeaturesUniquePtr FromAssembly(); 50 51 // Use external cpu_features library. 52 static ArmFeaturesUniquePtr FromCpuFeatures(); 53 54 bool Equals(const InstructionSetFeatures* other) const override; 55 56 bool HasAtLeast(const InstructionSetFeatures* other) const override; 57 GetInstructionSet()58 InstructionSet GetInstructionSet() const override { 59 return InstructionSet::kArm; 60 } 61 62 uint32_t AsBitmap() const override; 63 64 // Return a string of the form "div,lpae" or "none". 65 std::string GetFeatureString() const override; 66 67 // Is the divide instruction feature enabled? HasDivideInstruction()68 bool HasDivideInstruction() const { 69 return has_div_; 70 } 71 72 // Are the ldrd and strd instructions atomic? This is commonly true when the Large Physical 73 // Address Extension (LPAE) is present. HasAtomicLdrdAndStrd()74 bool HasAtomicLdrdAndStrd() const { 75 return has_atomic_ldrd_strd_; 76 } 77 78 // Are ARMv8-A instructions available? HasARMv8AInstructions()79 bool HasARMv8AInstructions() const { 80 return has_armv8a_; 81 } 82 ~ArmInstructionSetFeatures()83 virtual ~ArmInstructionSetFeatures() {} 84 85 protected: 86 // Parse a vector of the form "div", "lpae" adding these to a new ArmInstructionSetFeatures. 87 std::unique_ptr<const InstructionSetFeatures> 88 AddFeaturesFromSplitString(const std::vector<std::string>& features, 89 std::string* error_msg) const override; 90 91 private: ArmInstructionSetFeatures(bool has_div,bool has_atomic_ldrd_strd,bool has_armv8a)92 ArmInstructionSetFeatures(bool has_div, 93 bool has_atomic_ldrd_strd, 94 bool has_armv8a) 95 : InstructionSetFeatures(), 96 has_div_(has_div), 97 has_atomic_ldrd_strd_(has_atomic_ldrd_strd), 98 has_armv8a_(has_armv8a) {} 99 100 // Bitmap positions for encoding features as a bitmap. 101 enum { 102 kDivBitfield = 1 << 0, 103 kAtomicLdrdStrdBitfield = 1 << 1, 104 kARMv8A = 1 << 2, 105 }; 106 107 const bool has_div_; 108 const bool has_atomic_ldrd_strd_; 109 const bool has_armv8a_; 110 111 DISALLOW_COPY_AND_ASSIGN(ArmInstructionSetFeatures); 112 }; 113 114 } // namespace art 115 116 #endif // ART_RUNTIME_ARCH_ARM_INSTRUCTION_SET_FEATURES_ARM_H_ 117