/art/test/442-checker-constant-folding/src/ |
D | Main.java | 1451 long imm = 33L; in ReturnInt33() local 1468 float imm = 1.0e34f; in ReturnIntMax() local 1485 double imm = Double.NaN; in ReturnInt0() local 1502 int imm = 33; in ReturnLong33() local 1519 float imm = 34.0f; in ReturnLong34() local 1536 double imm = -Double.NaN; in ReturnLong0() local 1553 int imm = 33; in ReturnFloat33() local 1570 long imm = 34L; in ReturnFloat34() local 1587 double imm = 99.25; in ReturnFloat99P25() local 1601 int imm = 33; in ReturnDouble33() local [all …]
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/art/compiler/utils/x86/ |
D | assembler_x86.cc | 115 void X86Assembler::pushl(const Immediate& imm) { in pushl() 140 void X86Assembler::movl(Register dst, const Immediate& imm) { in movl() 168 void X86Assembler::movl(const Address& dst, const Immediate& imm) { in movl() 325 void X86Assembler::movb(const Address& dst, const Immediate& imm) { in movb() 379 void X86Assembler::movw(const Address& dst, const Immediate& imm) { in movw() 1830 void X86Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundsd() 1841 void X86Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundss() 2606 void X86Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufpd() 2616 void X86Assembler::shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufps() 2625 void X86Assembler::pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in pshufd() [all …]
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/art/compiler/utils/x86_64/ |
D | assembler_x86_64.cc | 114 void X86_64Assembler::pushq(const Immediate& imm) { in pushq() 142 void X86_64Assembler::movq(CpuRegister dst, const Immediate& imm) { in movq() 158 void X86_64Assembler::movl(CpuRegister dst, const Immediate& imm) { in movl() 167 void X86_64Assembler::movq(const Address& dst, const Immediate& imm) { in movq() 225 void X86_64Assembler::movl(const Address& dst, const Immediate& imm) { in movl() 328 void X86_64Assembler::movb(const Address& dst, const Immediate& imm) { in movb() 388 void X86_64Assembler::movw(const Address& dst, const Immediate& imm) { in movw() 2609 void X86_64Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundsd() 2621 void X86_64Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundss() 3550 void X86_64Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufpd() [all …]
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D | assembler_x86_64_test.cc | 114 x86_64::Immediate imm(value); in TEST() local
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/art/compiler/utils/ |
D | assembler_test.h | 216 for (int64_t imm : imms) { variable 252 for (int64_t imm : imms) { in RepeatTemplatedRegistersImmBits() local 288 for (int64_t imm : imms) { in RepeatTemplatedImmBitsRegisters() local 318 for (int64_t imm : imms) { in RepeatTemplatedRegisterImmBits() local 348 for (int64_t imm : imms) { in RepeatTemplatedRegisterImmBitsShift() local 374 for (int64_t imm : imms) { variable 406 for (int64_t imm : imms) { variable 673 for (int64_t imm : imms) { variable 1256 for (int64_t imm : imms) { in RepeatTemplatedMemImm() local 1492 for (int64_t imm : imms) { in RepeatTemplatedRegistersImm() local [all …]
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/art/disassembler/ |
D | disassembler_riscv64.cc | 108 uint32_t imm = (bits5_11 << 5) + bits0_4; in Decode32StoreOffset() local 398 uint32_t imm = (bits1_10 << 1) + (bit11 << 11) + (bits12_19 << 12) + (bit20 << 20); in Print32Jal() local 464 uint32_t imm = (bit12 << 12) + (bit11 << 11) + (bits5_10 << 5) + (bits1_4 << 1); in Print32BCond() local 713 int32_t imm = Decode32Imm12(insn32); in Print32BinOpImm() local 1677 uint32_t imm = BitFieldExtract(insn16, 5, 2); in Dump16() local 1735 int32_t imm = Decode16Imm6<int32_t>(insn16); in Dump16() local
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/art/compiler/optimizing/ |
D | scheduler_arm.cc | 926 void SchedulingLatencyVisitorARM::HandleDivRemConstantIntegralLatencies(int32_t imm) { in HandleDivRemConstantIntegralLatencies() 947 int32_t imm = Int32ConstantFrom(rhs->AsConstant()); in VisitDiv() local 1010 int32_t imm = Int32ConstantFrom(rhs->AsConstant()); in VisitRem() local
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D | scheduler_arm64.cc | 203 int64_t imm = Int64FromConstant(instr->GetRight()->AsConstant()); in VisitDiv() local 271 int64_t imm = Int64FromConstant(instruction->GetRight()->AsConstant()); in VisitRem() local
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D | code_generator_x86_64.cc | 3970 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue()); in VisitSub() local 4073 Immediate imm(mul->InputAt(1)->AsIntConstant()->GetValue()); in VisitMul() local 4231 int64_t imm = Int64FromConstant(second.GetConstant()); in DivRemOneOrMinusOne() local 4269 int64_t imm = Int64FromConstant(second.GetConstant()); in RemByPowerOfTwo() local 4305 int64_t imm = Int64FromConstant(second.GetConstant()); in DivByPowerOfTwo() local 4381 int imm = second.GetConstant()->AsIntConstant()->GetValue(); in GenerateDivRemWithAnyConstant() local 4413 int64_t imm = second.GetConstant()->AsLongConstant()->GetValue(); in GenerateDivRemWithAnyConstant() local 4481 int64_t imm = Int64FromConstant(second.GetConstant()); in GenerateDivRemIntegral() local 4989 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftDistance); in HandleShift() local 5011 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxLongShiftDistance); in HandleShift() local [all …]
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D | code_generator_riscv64.cc | 1437 int64_t imm = Int64FromConstant(second.GetConstant()); in DivRemOneOrMinusOne() local 1467 int64_t imm = Int64FromConstant(second.GetConstant()); in DivRemByPowerOfTwo() local 1512 int64_t imm = Int64FromConstant(second.GetConstant()); in GenerateDivRemWithAnyConstant() local 1544 int64_t imm = Int64FromConstant(second.GetConstant()); in GenerateDivRemIntegral() local 1587 int64_t imm = use_imm ? CodeGenerator::GetInt64ValueOf(rs2_location.GetConstant()) : 0; in GenerateIntLongCondition() local 2120 int64_t imm = CodeGenerator::GetInt64ValueOf(right->AsConstant()); in HandleBinaryOp() local 2162 int64_t imm = use_imm ? CodeGenerator::GetInt64ValueOf(rs2_location.GetConstant()) : 0; in HandleBinaryOp() local 2270 int64_t imm = CodeGenerator::GetInt64ValueOf(rhs->AsConstant()); in HandleCondition() local 2368 int64_t imm = CodeGenerator::GetInt64ValueOf(rs2_location.GetConstant()); in HandleShift() local
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D | code_generator_x86.cc | 3882 Immediate imm(mul->InputAt(1)->AsIntConstant()->GetValue()); in VisitMul() local 4124 int32_t imm = locations->InAt(1).GetConstant()->AsIntConstant()->GetValue(); in DivRemOneOrMinusOne() local 4145 int32_t imm = Int64FromConstant(second.GetConstant()); in RemByPowerOfTwo() local 4165 int32_t imm = locations->InAt(1).GetConstant()->AsIntConstant()->GetValue(); in DivByPowerOfTwo() local 4188 int imm = locations->InAt(1).GetConstant()->AsIntConstant()->GetValue(); in GenerateDivRemWithAnyConstant() local 4266 int32_t imm = second.GetConstant()->AsIntConstant()->GetValue(); in GenerateDivRemIntegral() local 4909 Immediate imm(shift); in HandleShift() local 5090 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftDistance); in VisitRor() local 5124 Immediate imm(shift_amt); in VisitRor() local 7107 Immediate imm(value); in EmitMove() local
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D | code_generator_arm64.cc | 3348 int64_t imm = Int64FromLocation(instruction->GetLocations()->InAt(1)); in FOR_EACH_CONDITION_INSTRUCTION() local 3454 int64_t imm = Int64FromConstant(second.GetConstant()); in GenerateInt64UnsignedDivRemWithAnyPositiveConstant() local 3505 int64_t imm = Int64FromConstant(second.GetConstant()); in GenerateInt64DivRemWithAnyConstant() local 3560 int64_t imm = Int64FromConstant(second.GetConstant()); in GenerateInt32DivRemWithAnyConstant() local 3628 int64_t imm = Int64FromLocation(instruction->GetLocations()->InAt(1)); in GenerateIntDivForConstDenom() local 6158 int64_t imm = Int64FromLocation(instruction->GetLocations()->InAt(1)); in GenerateIntRemForPower2Denom() local 6190 int64_t imm = Int64FromLocation(instruction->GetLocations()->InAt(1)); in GenerateIntRemForConstDenom() local
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D | code_generator_arm_vixl.cc | 4489 int32_t imm = Int32ConstantFrom(second); in DivRemOneOrMinusOne() local 4513 int32_t imm = Int32ConstantFrom(second); in DivRemByPowerOfTwo() local 4595 int32_t imm = Int32ConstantFrom(second); in GenerateDivRemWithAnyConstant() local 4676 int32_t imm = Int32ConstantFrom(second); in GenerateDivRemConstantIntegral() local
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/art/compiler/utils/arm/ |
D | assembler_arm_vixl.h | 168 void Vmov(vixl32::DRegister rd, double imm) { in Vmov()
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/art/dex2oat/linker/arm/ |
D | relative_patcher_thumb2.cc | 79 uint32_t imm = (diff16 >> 11) & 0x1u; in PatchPcRelativeReference() local
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/art/compiler/utils/riscv64/ |
D | assembler_riscv64.h | 2235 static constexpr uint32_t EncodeIntWidth(const int32_t imm) { in EncodeIntWidth() 2240 static constexpr uint32_t EncodeInt5(const int32_t imm) { return EncodeIntWidth<5>(imm); } in EncodeInt5() 2241 static constexpr uint32_t EncodeInt6(const int32_t imm) { return EncodeIntWidth<6>(imm); } in EncodeInt6() 2668 uint32_t funct3, uint32_t funct2, uint32_t imm, XRegister rd_s, uint32_t opcode) { in EmitCBArithmetic()
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D | assembler_riscv64_test.cc | 841 for (int64_t imm : kImm12s) { in TestAddConst() local 847 for (int64_t imm : imms) { in TestAddConst() local 857 for (int64_t imm : large_values) { in TestAddConst() local 911 for (int64_t imm : kImm12s) { in RepeatLoadStoreArbitraryOffset() local 917 for (int64_t imm : imms) { in RepeatLoadStoreArbitraryOffset() local 930 for (int64_t imm : kSplitOffsets) { in RepeatLoadStoreArbitraryOffset() local 939 for (int64_t imm : kSpecialOffsets) { in RepeatLoadStoreArbitraryOffset() local 1113 Imm imm = CreateImmediate(imm_raw); in RepeatCTemplateRegImm() local 1174 int32_t imm = CreateImmediate(imm_raw); in RepeatTemplatedShortRegistersImm() local 1256 Imm imm = CreateImmediate(imm_raw); in RepeatImm() local [all …]
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D | assembler_riscv64.cc | 1313 void Riscv64Assembler::CLi(XRegister rd, int32_t imm) { in CLi() 1335 void Riscv64Assembler::CAddiw(XRegister rd, int32_t imm) { in CAddiw() 1396 void Riscv64Assembler::CAndi(XRegister rd_s, int32_t imm) { in CAndi() 6115 void Riscv64Assembler::Li(XRegister rd, int64_t imm) { in Li() 7634 void Riscv64Assembler::LoadImmediate(XRegister rd, int64_t imm, bool can_use_tmp) { in LoadImmediate() 7640 auto addi = [&](XRegister rd, XRegister rs, int32_t imm) { Addi(rd, rs, imm); }; in LoadImmediate() 7641 auto addiw = [&](XRegister rd, XRegister rs, int32_t imm) { Addiw(rd, rs, imm); }; in LoadImmediate() 7642 auto slli = [&](XRegister rd, XRegister rs, int32_t imm) { Slli(rd, rs, imm); }; in LoadImmediate()
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