| /art/compiler/optimizing/ |
| D | intrinsics_riscv64.cc | 76 __ Addi(src_curr_addr, src_curr_addr, element_size); in EmitNativeCode() local
77 __ Addi(dst_curr_addr, dst_curr_addr, element_size); in EmitNativeCode() local
1197 __ Addi(temp1, temp1, sizeof(uint64_t)); in VisitStringEquals() local
1200 __ Addi(temp, temp, mirror::kUseStringCompression ? -8 : -4); in VisitStringEquals() local
1904 __ Addi(src_curr_addr, src_curr_addr, element_size); in VisitSystemArrayCopy() local
1905 __ Addi(dst_curr_addr, dst_curr_addr, element_size); in VisitSystemArrayCopy() local
2934 __ Addi(temp1, temp1, char_size * 4); in VisitStringCompareTo() local
2936 __ Addi(temp0, temp0, (mirror::kUseStringCompression) ? -8 : -4); in VisitStringCompareTo() local
2981 __ Addi(temp3, temp3, -1); // -1 if str is compressed, 0 otherwise in VisitStringCompareTo() local
2993 __ Addi(temp1, temp1, value_offset); in VisitStringCompareTo() local
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| D | code_generator_riscv64.cc | 1597 __ Addi(rd, rs1, -imm); // ADDI is OK here even for 32-bit comparison. in GenerateIntLongCondition() local
1667 __ Addi(rd, rd, -1); // 0 -> -1, 1 -> 0 in GenerateIntLongCondition() local
1858 __ Addi(rd, rd, -1); // 0 -> -1, 1 -> 0 in GenerateFpCondition() local
2051 __ Addi(temp, adjusted, -2); in GenPackedSwitchWithCompares() local
2194 __ Addi(rd, rs1, instruction->IsSub() ? -imm : imm); in HandleBinaryOp() local
2640 __ Addi(tmp, tmp, -1); in GenerateMethodEntryExitHook() local
2647 __ Addi(tmp, tmp, -dchecked_integral_cast<int32_t>(kNumEntriesForWallClock)); in GenerateMethodEntryExitHook() local
3394 __ Addi(temp, temp, 2 * kHeapReferenceSize); in VisitCheckCast() local
3395 __ Addi(temp2, temp2, -2); in VisitCheckCast() local
3549 __ Addi(tmp, tmp, -1); in VisitCompare() local
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| /art/compiler/utils/riscv64/ |
| D | assembler_riscv64.cc | 305 void Riscv64Assembler::Addi(XRegister rd, XRegister rs1, int32_t imm12) { in Addi() function in art::riscv64::Riscv64Assembler
6113 void Riscv64Assembler::Nop() { Addi(Zero, Zero, 0); } in Nop()
6119 void Riscv64Assembler::Mv(XRegister rd, XRegister rs) { Addi(rd, rs, 0); } in Mv()
6380 template <typename ValueType, typename Addi, typename AddLarge>
6385 Addi&& addi, in AddConstImpl()
6431 auto addi = [&](XRegister rd, XRegister rs1, int32_t value) { Addi(rd, rs1, value); }; in AddConst64()
7163 emit_auipc_and_next(lhs, [&](int32_t short_offset) { Addi(lhs, lhs, short_offset); }); in EmitBranch()
7577 Addi(tmp, base, adjustment); in AdjustBaseAndOffset()
7580 Addi(tmp, base, kNegativeOffsetSimpleAdjustment); in AdjustBaseAndOffset()
7640 auto addi = [&](XRegister rd, XRegister rs, int32_t imm) { Addi(rd, rs, imm); }; in LoadImmediate()
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| D | assembler_riscv64_test.cc | 2491 TEST_F(AssemblerRISCV64Test, Addi) { in TEST_F() argument
2492 …DriverStr(RepeatRRIb(&Riscv64Assembler::Addi, /*imm_bits=*/-12, "addi {reg1}, {reg2}, {imm}"), "Ad… in TEST_F()
2497 DriverStr(RepeatRRIb(&Riscv64Assembler::Addi, /*imm_bits=*/-12, "addi {reg1}, {reg2}, {imm}"), in TEST_F()
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| D | assembler_riscv64.h | 289 void Addi(XRegister rd, XRegister rs1, int32_t imm12);
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