Searched refs:Bge (Results 1 – 4 of 4) sorted by relevance
/art/compiler/utils/riscv64/ |
D | assembler_riscv64_test.cc | 542 __ Bge(rs, rt, label, is_bare); in EmitBcondForAllConditions() local 2372 TEST_F(AssemblerRISCV64Test, Bge) { in TEST_F() argument 2375 &Riscv64Assembler::Bge, /*imm_bits=*/-12, /*shift=*/1, "bge {reg1}, {reg2}, {imm}\n"), in TEST_F() 8838 __ Bge(reg, reg, &label); in TEST_F() local
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D | assembler_riscv64.cc | 148 void Riscv64Assembler::Bge(XRegister rs1, XRegister rs2, int32_t offset) { in Bge() function in art::riscv64::Riscv64Assembler 6228 Bge(Zero, rt, offset); in Blez() 6232 Bge(rt, Zero, offset); in Bgez() 6248 Bge(rt, rs, offset); in Ble() 6457 Bge(rs, Zero, label, is_bare); in Bgez() 6480 void Riscv64Assembler::Bge(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare) { in Bge() function in art::riscv64::Riscv64Assembler
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D | assembler_riscv64.h | 269 void Bge(XRegister rs1, XRegister rs2, int32_t offset); 1813 void Bge(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare = false);
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/art/compiler/optimizing/ |
D | code_generator_riscv64.cc | 1725 __ Bge(left, right_reg, label); in GenerateIntLongCompareAndBranch() local
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