| /art/compiler/optimizing/ |
| D | code_generator_riscv64.cc | 1737 __ Bgeu(left, right_reg, label); in GenerateIntLongCompareAndBranch() local
2235 __ Bgeu(tmp, tmp2, &done); in HandleBinaryOp() local
2239 __ Bgeu(tmp, tmp2, &done); in HandleBinaryOp() local
3172 __ Bgeu(index, length, slow_path->GetEntryLabel()); in VisitBoundsCheck() local
4860 __ Bgeu(adjusted, temp2, codegen_->GetLabelOf(default_block)); // Can clobber `TMP` if taken. in VisitPackedSwitch() local
5978 __ Bgeu(tmp, tmp2, &frame_entry_label_); // Can clobber `TMP` if taken. in GenerateFrameEntry() local
5982 __ Bgeu(tmp, tmp2, &memory_barrier); // Can clobber `TMP` if taken. in GenerateFrameEntry() local
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| D | intrinsics_riscv64.cc | 726 __ Bgeu(out, temp, &allocate); in BOXED_TYPES() local
1689 __ Bgeu(length.AsRegister<XRegister>(), temp1, intrinsic_slow_path->GetEntryLabel()); in VisitSystemArrayCopy() local
3324 __ Bgeu(index, temp, slow_path->GetEntryLabel()); in GenerateVarHandleArrayChecks() local
4670 __ Bgeu(index, temp, GetEntryLabel()); in EmitByteArrayViewCode() local
4672 __ Bgeu(temp2, temp, GetEntryLabel()); in EmitByteArrayViewCode() local
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| /art/compiler/utils/riscv64/ |
| D | assembler_riscv64_test.cc | 546 __ Bgeu(rs, rt, label, is_bare); in EmitBcondForAllConditions() local
2386 TEST_F(AssemblerRISCV64Test, Bgeu) { in TEST_F() argument
2389 &Riscv64Assembler::Bgeu, /*imm_bits=*/-12, /*shift=*/1, "bgeu {reg1}, {reg2}, {imm}\n"), in TEST_F()
8841 __ Bgeu(reg, reg, &label); in TEST_F() local
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| D | assembler_riscv64.h | 271 void Bgeu(XRegister rs1, XRegister rs2, int32_t offset);
1817 void Bgeu(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare = false);
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| D | assembler_riscv64.cc | 156 void Riscv64Assembler::Bgeu(XRegister rs1, XRegister rs2, int32_t offset) { in Bgeu() function in art::riscv64::Riscv64Assembler
6256 Bgeu(rt, rs, offset); in Bleu()
6496 void Riscv64Assembler::Bgeu(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare) { in Bgeu() function in art::riscv64::Riscv64Assembler
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